Add arm64 support (untested)
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3 changed files with 5 additions and 2 deletions
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@ -159,7 +159,7 @@ type
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# alias conditionals to condsyms (end of module).
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# alias conditionals to condsyms (end of module).
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cpuNone, cpuI386, cpuM68k, cpuAlpha, cpuPowerpc, cpuPowerpc64,
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cpuNone, cpuI386, cpuM68k, cpuAlpha, cpuPowerpc, cpuPowerpc64,
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cpuPowerpc64el, cpuSparc, cpuVm, cpuIa64, cpuAmd64, cpuMips, cpuMipsel,
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cpuPowerpc64el, cpuSparc, cpuVm, cpuIa64, cpuAmd64, cpuMips, cpuMipsel,
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cpuArm, cpuJS, cpuNimrodVM, cpuAVR
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cpuArm, cpuArm64, cpuJS, cpuNimrodVM, cpuAVR
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type
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type
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TEndian* = enum
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TEndian* = enum
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@ -183,6 +183,7 @@ const
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(name: "mips", intSize: 32, endian: bigEndian, floatSize: 64, bit: 32),
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(name: "mips", intSize: 32, endian: bigEndian, floatSize: 64, bit: 32),
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(name: "mipsel", intSize: 32, endian: littleEndian, floatSize: 64, bit: 32),
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(name: "mipsel", intSize: 32, endian: littleEndian, floatSize: 64, bit: 32),
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(name: "arm", intSize: 32, endian: littleEndian, floatSize: 64, bit: 32),
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(name: "arm", intSize: 32, endian: littleEndian, floatSize: 64, bit: 32),
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(name: "arm64", intSize: 64, endian: littleEndian, floatSize: 64, bit: 64),
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(name: "js", intSize: 32, endian: bigEndian,floatSize: 64,bit: 32),
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(name: "js", intSize: 32, endian: bigEndian,floatSize: 64,bit: 32),
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(name: "nimrodvm", intSize: 32, endian: bigEndian, floatSize: 64, bit: 32),
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(name: "nimrodvm", intSize: 32, endian: bigEndian, floatSize: 64, bit: 32),
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(name: "avr", intSize: 16, endian: littleEndian, floatSize: 32, bit: 16)]
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(name: "avr", intSize: 16, endian: littleEndian, floatSize: 32, bit: 16)]
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@ -1151,7 +1151,7 @@ const
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hostCPU* {.magic: "HostCPU".}: string = ""
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hostCPU* {.magic: "HostCPU".}: string = ""
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## a string that describes the host CPU. Possible values:
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## a string that describes the host CPU. Possible values:
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## "i386", "alpha", "powerpc", "powerpc64", "powerpc64el", "sparc",
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## "i386", "alpha", "powerpc", "powerpc64", "powerpc64el", "sparc",
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## "amd64", "mips", "mipsel", "arm".
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## "amd64", "mips", "mipsel", "arm", "arm64".
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seqShallowFlag = low(int)
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seqShallowFlag = low(int)
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@ -25,6 +25,7 @@ type
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mips, ## Mips based processor
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mips, ## Mips based processor
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mipsel, ## Little Endian Mips based processor
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mipsel, ## Little Endian Mips based processor
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arm, ## ARM based processor
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arm, ## ARM based processor
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arm64, ## ARM64 based processor
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vm, ## Some Virtual machine: Nim's VM or JavaScript
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vm, ## Some Virtual machine: Nim's VM or JavaScript
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avr ## AVR based processor
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avr ## AVR based processor
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@ -72,6 +73,7 @@ const
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elif defined(mips): CpuPlatform.mips
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elif defined(mips): CpuPlatform.mips
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elif defined(mipsel): CpuPlatform.mipsel
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elif defined(mipsel): CpuPlatform.mipsel
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elif defined(arm): CpuPlatform.arm
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elif defined(arm): CpuPlatform.arm
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elif defined(arm64): CpuPlatform.arm64
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elif defined(vm): CpuPlatform.vm
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elif defined(vm): CpuPlatform.vm
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elif defined(avr): CpuPlatform.avr
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elif defined(avr): CpuPlatform.avr
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else: CpuPlatform.none
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else: CpuPlatform.none
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