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Document vmgen.nim a bit

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This commit is contained in:
flaviut 2014-04-20 17:10:15 -04:00
commit 29261a0eae
1 changed files with 10 additions and 0 deletions
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compiler/vmgen.nim
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@ -70,6 +70,9 @@ proc echoCode*(c: PCtx, start=0) {.deprecated.} =
echo buf echo buf
proc gABC(ctx: PCtx; n: PNode; opc: TOpcode; a, b, c: TRegister = 0) = proc gABC(ctx: PCtx; n: PNode; opc: TOpcode; a, b, c: TRegister = 0) =
## Takes the registers `b` and `c`, applies the operation `opc` to them, and
## stores the result into register `a`
## The node is needed for debug information
assert opc.ord < 255 assert opc.ord < 255
let ins = (opc.uint32 or (a.uint32 shl 8'u32) or let ins = (opc.uint32 or (a.uint32 shl 8'u32) or
(b.uint32 shl 16'u32) or (b.uint32 shl 16'u32) or
@ -78,6 +81,10 @@ proc gABC(ctx: PCtx; n: PNode; opc: TOpcode; a, b, c: TRegister = 0) =
ctx.debug.add(n.info) ctx.debug.add(n.info)
proc gABI(c: PCtx; n: PNode; opc: TOpcode; a, b: TRegister; imm: BiggestInt) = proc gABI(c: PCtx; n: PNode; opc: TOpcode; a, b: TRegister; imm: BiggestInt) =
# Takes the `b` register and the immediate `imm`, appies the operation `opc`,
# and stores the output value into `a`.
# `imm` is signed and must be within [-127, 128]
assert(imm >= -127 and imm <= 128)
let ins = (opc.uint32 or (a.uint32 shl 8'u32) or let ins = (opc.uint32 or (a.uint32 shl 8'u32) or
(b.uint32 shl 16'u32) or (b.uint32 shl 16'u32) or
(imm+byteExcess).uint32 shl 24'u32).TInstr (imm+byteExcess).uint32 shl 24'u32).TInstr
@ -85,6 +92,9 @@ proc gABI(c: PCtx; n: PNode; opc: TOpcode; a, b: TRegister; imm: BiggestInt) =
c.debug.add(n.info) c.debug.add(n.info)
proc gABx(c: PCtx; n: PNode; opc: TOpcode; a: TRegister = 0; bx: int) = proc gABx(c: PCtx; n: PNode; opc: TOpcode; a: TRegister = 0; bx: int) =
# Applies `opc` to `bx` and stores it into register `a`
# `bx` must be signed and in the range [-32767, 32768]
assert(bx >= -32767 and bx <= 32768)
let ins = (opc.uint32 or a.uint32 shl 8'u32 or let ins = (opc.uint32 or a.uint32 shl 8'u32 or
(bx+wordExcess).uint32 shl 16'u32).TInstr (bx+wordExcess).uint32 shl 16'u32).TInstr
c.code.add(ins) c.code.add(ins)