Add RISC-V (riscv64) support (#7417)
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3 changed files with 9 additions and 5 deletions
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@ -1377,7 +1377,8 @@ const
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hostCPU* {.magic: "HostCPU".}: string = ""
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## a string that describes the host CPU. Possible values:
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## "i386", "alpha", "powerpc", "powerpc64", "powerpc64el", "sparc",
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## "amd64", "mips", "mipsel", "arm", "arm64", "mips64", "mips64el".
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## "amd64", "mips", "mipsel", "arm", "arm64", "mips64", "mips64el",
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## "riscv64".
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seqShallowFlag = low(int)
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strlitFlag = 1 shl (sizeof(int)*8 - 2) # later versions of the codegen \
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