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Add RISC-V (riscv64) support (#7417)

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Federico Ceratto 2018-04-06 23:40:39 +01:00 • committed by Andreas Rumpf
commit 673f5f3534
3 changed files with 9 additions and 5 deletions
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5
compiler/platform.nim
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@ -176,7 +176,7 @@ type
cpuNone, cpuI386, cpuM68k, cpuAlpha, cpuPowerpc, cpuPowerpc64, cpuNone, cpuI386, cpuM68k, cpuAlpha, cpuPowerpc, cpuPowerpc64,
cpuPowerpc64el, cpuSparc, cpuVm, cpuIa64, cpuAmd64, cpuMips, cpuMipsel, cpuPowerpc64el, cpuSparc, cpuVm, cpuIa64, cpuAmd64, cpuMips, cpuMipsel,
cpuArm, cpuArm64, cpuJS, cpuNimrodVM, cpuAVR, cpuMSP430, cpuSparc64, cpuArm, cpuArm64, cpuJS, cpuNimrodVM, cpuAVR, cpuMSP430, cpuSparc64,
cpuMips64, cpuMips64el cpuMips64, cpuMips64el, cpuRiscV64
type type
TEndian* = enum TEndian* = enum
@ -207,7 +207,8 @@ const
(name: "msp430", intSize: 16, endian: littleEndian, floatSize: 32, bit: 16), (name: "msp430", intSize: 16, endian: littleEndian, floatSize: 32, bit: 16),
(name: "sparc64", intSize: 64, endian: bigEndian, floatSize: 64, bit: 64), (name: "sparc64", intSize: 64, endian: bigEndian, floatSize: 64, bit: 64),
(name: "mips64", intSize: 64, endian: bigEndian, floatSize: 64, bit: 64), (name: "mips64", intSize: 64, endian: bigEndian, floatSize: 64, bit: 64),
(name: "mips64el", intSize: 64, endian: littleEndian, floatSize: 64, bit: 64)] (name: "mips64el", intSize: 64, endian: littleEndian, floatSize: 64, bit: 64),
(name: "riscv64", intSize: 64, endian: littleEndian, floatSize: 64, bit: 64)]
var var
targetCPU*, hostCPU*: TSystemCPU targetCPU*, hostCPU*: TSystemCPU

3
lib/system.nim
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@ -1377,7 +1377,8 @@ const
hostCPU* {.magic: "HostCPU".}: string = "" hostCPU* {.magic: "HostCPU".}: string = ""
## a string that describes the host CPU. Possible values: ## a string that describes the host CPU. Possible values:
## "i386", "alpha", "powerpc", "powerpc64", "powerpc64el", "sparc", ## "i386", "alpha", "powerpc", "powerpc64", "powerpc64el", "sparc",
## "amd64", "mips", "mipsel", "arm", "arm64", "mips64", "mips64el". ## "amd64", "mips", "mipsel", "arm", "arm64", "mips64", "mips64el",
## "riscv64".
seqShallowFlag = low(int) seqShallowFlag = low(int)
strlitFlag = 1 shl (sizeof(int)*8 - 2) # later versions of the codegen \ strlitFlag = 1 shl (sizeof(int)*8 - 2) # later versions of the codegen \

6
lib/system/platforms.nim
View file

@ -29,8 +29,9 @@ type
arm, ## ARM based processor arm, ## ARM based processor
arm64, ## ARM64 based processor arm64, ## ARM64 based processor
vm, ## Some Virtual machine: Nim's VM or JavaScript vm, ## Some Virtual machine: Nim's VM or JavaScript
avr ## AVR based processor avr, ## AVR based processor
msp430 ## TI MSP430 microcontroller msp430, ## TI MSP430 microcontroller
riscv64 ## RISC-V 64-bit processor
OsPlatform* {.pure.} = enum ## the OS this program will run on. OsPlatform* {.pure.} = enum ## the OS this program will run on.
none, dos, windows, os2, linux, morphos, skyos, solaris, none, dos, windows, os2, linux, morphos, skyos, solaris,
@ -84,5 +85,6 @@ const
elif defined(vm): CpuPlatform.vm elif defined(vm): CpuPlatform.vm
elif defined(avr): CpuPlatform.avr elif defined(avr): CpuPlatform.avr
elif defined(msp430): CpuPlatform.msp430 elif defined(msp430): CpuPlatform.msp430
elif defined(riscv64): CpuPlatform.riscv64
else: CpuPlatform.none else: CpuPlatform.none
## the CPU this program will run on. ## the CPU this program will run on.