Add Mipsel CPU support (untested)
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3 changed files with 6 additions and 2 deletions
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@ -158,7 +158,7 @@ type
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TSystemCPU* = enum # Also add CPU for in initialization section and
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TSystemCPU* = enum # Also add CPU for in initialization section and
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# alias conditionals to condsyms (end of module).
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# alias conditionals to condsyms (end of module).
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cpuNone, cpuI386, cpuM68k, cpuAlpha, cpuPowerpc, cpuPowerpc64,
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cpuNone, cpuI386, cpuM68k, cpuAlpha, cpuPowerpc, cpuPowerpc64,
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cpuSparc, cpuVm, cpuIa64, cpuAmd64, cpuMips, cpuArm,
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cpuSparc, cpuVm, cpuIa64, cpuAmd64, cpuMips, cpuMipsel, cpuArm,
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cpuJS, cpuNimrodVM, cpuAVR
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cpuJS, cpuNimrodVM, cpuAVR
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type
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type
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@ -180,6 +180,7 @@ const
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(name: "ia64", intSize: 64, endian: littleEndian, floatSize: 64, bit: 64),
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(name: "ia64", intSize: 64, endian: littleEndian, floatSize: 64, bit: 64),
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(name: "amd64", intSize: 64, endian: littleEndian, floatSize: 64, bit: 64),
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(name: "amd64", intSize: 64, endian: littleEndian, floatSize: 64, bit: 64),
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(name: "mips", intSize: 32, endian: bigEndian, floatSize: 64, bit: 32),
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(name: "mips", intSize: 32, endian: bigEndian, floatSize: 64, bit: 32),
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(name: "mipsel", intSize: 32, endian: littleEndian, floatSize: 64, bit: 32),
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(name: "arm", intSize: 32, endian: littleEndian, floatSize: 64, bit: 32),
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(name: "arm", intSize: 32, endian: littleEndian, floatSize: 64, bit: 32),
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(name: "js", intSize: 32, endian: bigEndian,floatSize: 64,bit: 32),
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(name: "js", intSize: 32, endian: bigEndian,floatSize: 64,bit: 32),
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(name: "nimrodvm", intSize: 32, endian: bigEndian, floatSize: 64, bit: 32),
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(name: "nimrodvm", intSize: 32, endian: bigEndian, floatSize: 64, bit: 32),
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@ -1150,7 +1150,8 @@ const
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hostCPU* {.magic: "HostCPU".}: string = ""
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hostCPU* {.magic: "HostCPU".}: string = ""
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## a string that describes the host CPU. Possible values:
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## a string that describes the host CPU. Possible values:
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## "i386", "alpha", "powerpc", "powerpc64", "sparc", "amd64", "mips", "arm".
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## "i386", "alpha", "powerpc", "powerpc64", "sparc", "amd64", "mips",
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## "mipsel", "arm".
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seqShallowFlag = low(int)
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seqShallowFlag = low(int)
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@ -22,6 +22,7 @@ type
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ia64, ## Intel Itanium
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ia64, ## Intel Itanium
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amd64, ## x86_64 (AMD64); 64 bit x86 compatible CPU
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amd64, ## x86_64 (AMD64); 64 bit x86 compatible CPU
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mips, ## Mips based processor
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mips, ## Mips based processor
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mipsel, ## Little Endian Mips based processor
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arm, ## ARM based processor
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arm, ## ARM based processor
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vm, ## Some Virtual machine: Nim's VM or JavaScript
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vm, ## Some Virtual machine: Nim's VM or JavaScript
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avr ## AVR based processor
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avr ## AVR based processor
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@ -67,6 +68,7 @@ const
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elif defined(ia64): CpuPlatform.ia64
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elif defined(ia64): CpuPlatform.ia64
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elif defined(amd64): CpuPlatform.amd64
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elif defined(amd64): CpuPlatform.amd64
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elif defined(mips): CpuPlatform.mips
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elif defined(mips): CpuPlatform.mips
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elif defined(mipsel): CpuPlatform.mipsel
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elif defined(arm): CpuPlatform.arm
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elif defined(arm): CpuPlatform.arm
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elif defined(vm): CpuPlatform.vm
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elif defined(vm): CpuPlatform.vm
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elif defined(avr): CpuPlatform.avr
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elif defined(avr): CpuPlatform.avr
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