big steps torwards an efficient, simple IC implementation (#16543)
* reworked ID handling * the packed AST now has its own ID mechanism * basic serialization code works * extract rodfiles to its own module * rodfiles: store and compare configs * rodfiles: store dependencies * store config at the end * precise dependency tracking * dependency tracking for rodfiles * completed loading of PSym, PType, etc * removed dead code * bugfix: do not realloc seqs when taking addr into an element * make IC opt-in for now * makes tcompilerapi green again * final cleanups Co-authored-by: Andy Davidoff <github@andy.disruptek.com>
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57 changed files with 1429 additions and 1717 deletions
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@ -11,7 +11,7 @@
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import
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ast, astalgo, magicsys, msgs, options,
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idents, lexer, passes, syntaxes, llstream, modulegraphs, rod,
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idents, lexer, passes, syntaxes, llstream, modulegraphs,
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lineinfos, pathutils, tables
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proc resetSystemArtifacts*(g: ModuleGraph) =
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@ -93,8 +93,10 @@ proc compileModule*(graph: ModuleGraph; fileIdx: FileIndex; flags: TSymFlags): P
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discard processModule(graph, result, idGeneratorFromModule(result), s)
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if result == nil:
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let filename = AbsoluteFile toFullPath(graph.config, fileIdx)
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result = loadModuleSym(graph, fileIdx, filename)
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if result == nil:
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when false:
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# XXX entry point for module loading from the rod file
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result = loadModuleSym(graph, fileIdx, filename)
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when true:
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result = newModule(graph, fileIdx)
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result.flags.incl flags
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registerModule(graph, result)
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