cleaned up some debugging code
This commit is contained in:
parent
083d4f4708
commit
86bf97a730
8 changed files with 66 additions and 110 deletions
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@ -188,19 +188,9 @@ proc genRefAssign(p: BProc, dest, src: TLoc, flags: TAssignmentFlags) =
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linefmt(p, cpsStmts, "#asgnRef((void**) $1, $2);$n",
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linefmt(p, cpsStmts, "#asgnRef((void**) $1, $2);$n",
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addrLoc(dest), rdLoc(src))
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addrLoc(dest), rdLoc(src))
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else:
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else:
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if cnimdbg:
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echo "ASSIGN REF ", dest.k, " ", dest.s, " ", dest.r.ropeToStr
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if dest.heapRoot != nil:
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echo "ROOTED AT ", dest.heapRoot.ropeToStr
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linefmt(p, cpsStmts, "#asgnRefNoCycle((void**) $1, $2);$n",
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linefmt(p, cpsStmts, "#asgnRefNoCycle((void**) $1, $2);$n",
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addrLoc(dest), rdLoc(src))
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addrLoc(dest), rdLoc(src))
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else:
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else:
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if cnimdbg:
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echo "ASSIGN REF ", dest.k, " ", dest.s, " ", dest.r.ropeToStr
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if dest.heapRoot != nil:
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echo "ROOTED AT ", dest.heapRoot.ropeToStr
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linefmt(p, cpsStmts, "#unsureAsgnRef((void**) $1, $2);$n",
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linefmt(p, cpsStmts, "#unsureAsgnRef((void**) $1, $2);$n",
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addrLoc(dest), rdLoc(src))
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addrLoc(dest), rdLoc(src))
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if needToKeepAlive in flags: keepAlive(p, dest)
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if needToKeepAlive in flags: keepAlive(p, dest)
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@ -1133,18 +1133,16 @@ proc rawNewModule(module: PSym): BModule =
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result = rawNewModule(module, module.filename)
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result = rawNewModule(module, module.filename)
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proc newModule(module: PSym): BModule =
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proc newModule(module: PSym): BModule =
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result = getCgenModule(module)
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# we should create only one cgen module for each module sym
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if result == nil:
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InternalAssert getCgenModule(module) == nil
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result = rawNewModule(module)
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growCache gModules, module.position
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gModules[module.position] = result
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if (optDeadCodeElim in gGlobalOptions):
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result = rawNewModule(module)
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if (sfDeadCodeElim in module.flags):
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growCache gModules, module.position
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InternalError("added pending module twice: " & module.filename)
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gModules[module.position] = result
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else:
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echo "CGEN CACHED MODULE: ", result.filename
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if (optDeadCodeElim in gGlobalOptions):
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assert optCaasEnabled in gGlobalOptions
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if (sfDeadCodeElim in module.flags):
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InternalError("added pending module twice: " & module.filename)
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proc myOpen(module: PSym): PPassContext =
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proc myOpen(module: PSym): PPassContext =
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result = newModule(module)
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result = newModule(module)
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@ -1260,7 +1258,6 @@ proc updateCachedModule(m: BModule) =
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let cfilenoext = changeFileExt(cfile, "")
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let cfilenoext = changeFileExt(cfile, "")
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if mergeRequired(m):
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if mergeRequired(m):
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echo "MERGE REQUIRED FOR ", m.filename
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mergeFiles(cfile, m)
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mergeFiles(cfile, m)
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genInitCode(m)
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genInitCode(m)
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finishTypeDescriptions(m)
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finishTypeDescriptions(m)
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@ -1271,6 +1268,7 @@ proc updateCachedModule(m: BModule) =
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addFileToLink(cfilenoext)
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addFileToLink(cfilenoext)
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proc cgenCaasUpdate* =
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proc cgenCaasUpdate* =
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# XXX(zah): clean-up the fromCache mess
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for m in cgenModules():
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for m in cgenModules():
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if m.fromCache: m.updateCachedModule
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if m.fromCache: m.updateCachedModule
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@ -143,7 +143,8 @@ proc newProc*(prc: PSym, module: BModule): BProc =
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iterator cgenModules*: var BModule =
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iterator cgenModules*: var BModule =
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for i in 0..high(gModules):
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for i in 0..high(gModules):
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# some modules (like stdin) may exist only in memory.
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# ultimately, we are iterating over the file ids here.
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# they won't have a cgen BModule for them and we must skip them.
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# some "files" won't have an associated cgen module (like stdin)
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# and we must skip over them.
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if gModules[i] != nil: yield gModules[i]
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if gModules[i] != nil: yield gModules[i]
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@ -509,10 +509,10 @@ proc getEscapedChar(L: var TLexer, tok: var TToken) =
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else: lexMessage(L, errInvalidCharacterConstant)
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else: lexMessage(L, errInvalidCharacterConstant)
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else: lexMessage(L, errInvalidCharacterConstant)
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else: lexMessage(L, errInvalidCharacterConstant)
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proc newString(s: cstring, l: int): string =
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proc newString(s: cstring, len: int): string =
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## XXX, how come there is no support for this?
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## XXX, how come there is no support for this?
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result = newString(l)
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result = newString(len)
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for i in 0 .. <l:
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for i in 0 .. <len:
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result[i] = s[i]
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result[i] = s[i]
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proc HandleCRLF(L: var TLexer, pos: int): int =
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proc HandleCRLF(L: var TLexer, pos: int): int =
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@ -442,8 +442,13 @@ proc resetMemory =
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GC_fullCollect()
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GC_fullCollect()
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echo GC_getStatistics()
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echo GC_getStatistics()
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const
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SimiluateCaasMemReset = false
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PrintRopeCacheStats = false
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proc MainCommand =
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proc MainCommand =
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gGlobalOptions.incl(optCaasEnabled)
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when SimiluateCaasMemReset:
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gGlobalOptions.incl(optCaasEnabled)
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# In "nimrod serve" scenario, each command must reset the registered passes
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# In "nimrod serve" scenario, each command must reset the registered passes
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clearPasses()
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clearPasses()
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@ -561,19 +566,21 @@ proc MainCommand =
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gGlobalOptions.incl(optCaasEnabled)
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gGlobalOptions.incl(optCaasEnabled)
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msgs.gErrorMax = high(int) # do not stop after first error
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msgs.gErrorMax = high(int) # do not stop after first error
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serve(MainCommand)
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serve(MainCommand)
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else:
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else: rawMessage(errInvalidCommandX, command)
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rawMessage(errInvalidCommandX, command)
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if msgs.gErrorCounter == 0 and gCmd notin {cmdInterpret, cmdRun}:
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if msgs.gErrorCounter == 0 and gCmd notin {cmdInterpret, cmdRun}:
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rawMessage(hintSuccessX, [$gLinesCompiled,
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rawMessage(hintSuccessX, [$gLinesCompiled,
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formatFloat(epochTime() - gLastCmdTime, ffDecimal, 3),
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formatFloat(epochTime() - gLastCmdTime, ffDecimal, 3),
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formatSize(getTotalMem())])
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formatSize(getTotalMem())])
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echo "rope cache stats: "
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when PrintRopeCacheStats:
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echo " tries : ", gCacheTries
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echo "rope cache stats: "
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echo " misses: ", gCacheMisses
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echo " tries : ", gCacheTries
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echo " int tries: ", gCacheIntTries
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echo " misses: ", gCacheMisses
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echo " efficiency: ", formatFloat(1-(gCacheMisses.float/gCacheTries.float), ffDecimal, 3)
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echo " int tries: ", gCacheIntTries
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echo " efficiency: ", formatFloat(1-(gCacheMisses.float/gCacheTries.float), ffDecimal, 3)
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# resetMemory()
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when SimiluateCaasMemReset:
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resetMemory()
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@ -96,6 +96,8 @@ const
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# XXX: still has problems in release mode in the compiler itself.
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# XXX: still has problems in release mode in the compiler itself.
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# investigate how it affects growObj
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# investigate how it affects growObj
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CollectCyclesStats = false
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type
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type
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TWalkOp = enum
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TWalkOp = enum
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waPush
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waPush
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@ -203,8 +205,6 @@ proc addZCT(zct: var TCellSeq, c: PCell) {.noinline.} =
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if c.isBitDown(rcZct):
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if c.isBitDown(rcZct):
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c.setBit rcZct
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c.setBit rcZct
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zct.add c
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zct.add c
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# writecell("adding to ZCT 1", c)
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# cprintf ("called from %d\n", framePtr.prev.line)
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template setStackTop(gch) =
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template setStackTop(gch) =
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# This must be called immediately after we enter the GC code
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# This must be called immediately after we enter the GC code
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@ -257,7 +257,6 @@ proc forAllChildrenAux(dest: Pointer, mt: PNimType, op: TWalkOp)
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# we need the prototype here for debugging purposes
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# we need the prototype here for debugging purposes
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proc prepareDealloc(cell: PCell) =
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proc prepareDealloc(cell: PCell) =
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# writecell("finalizers", cell)
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if cell.typ.finalizer != nil:
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if cell.typ.finalizer != nil:
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# the finalizer could invoke something that
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# the finalizer could invoke something that
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# allocates memory; this could trigger a garbage
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# allocates memory; this could trigger a garbage
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@ -397,7 +396,6 @@ template doDecRef(cc: PCell,
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# this is the last reference from the heap
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# this is the last reference from the heap
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# add to a zero-count-table that will be matched against stack pointers
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# add to a zero-count-table that will be matched against stack pointers
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rtlAddZCT(c)
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rtlAddZCT(c)
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# writeCell("decref to 0", c)
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else:
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else:
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when cycleFlag != Acyclic:
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when cycleFlag != Acyclic:
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if cycleFlag == Cyclic or canBeCycleRoot(c):
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if cycleFlag == Cyclic or canBeCycleRoot(c):
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@ -559,7 +557,6 @@ proc addNewObjToZCT(res: PCell, gch: var TGcHeap) {.inline.} =
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# all slots 68%
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# all slots 68%
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var L = gch.zct.len
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var L = gch.zct.len
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var d = gch.zct.d
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var d = gch.zct.d
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#writecell("ZCT ADDING 2", res)
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when true:
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when true:
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# loop unrolled for performance:
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# loop unrolled for performance:
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template replaceZctEntry(i: expr) =
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template replaceZctEntry(i: expr) =
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@ -622,7 +619,6 @@ proc rawNewObj(typ: PNimType, size: int, gch: var TGcHeap, rc1: bool): pointer =
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addNewObjToZCT(res, gch)
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addNewObjToZCT(res, gch)
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if NewObjectsAreCycleRoots and canBeCycleRoot(res):
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if NewObjectsAreCycleRoots and canBeCycleRoot(res):
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# writeCell("cyclic allocation", res)
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res.setBit(rcInCycleRoots)
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res.setBit(rcInCycleRoots)
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res.setColor rcCycleCandidate
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res.setColor rcCycleCandidate
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gch.cycleRoots.add res
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gch.cycleRoots.add res
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@ -647,7 +643,6 @@ proc freeCell(gch: var TGcHeap, c: PCell) =
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else:
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else:
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sysAssert(c.typ != nil, "collectCycles")
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sysAssert(c.typ != nil, "collectCycles")
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zeroMem(c, sizeof(TCell))
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zeroMem(c, sizeof(TCell))
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# writecell("nuked cell", c)
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template eraseAt(cells: var TCellSeq, at: int): stmt =
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template eraseAt(cells: var TCellSeq, at: int): stmt =
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cells.d[at] = cells.d[cells.len - 1]
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cells.d[at] = cells.d[cells.len - 1]
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@ -706,16 +701,13 @@ proc growObj(old: pointer, newsize: int, gch: var TGcHeap): pointer =
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var d = gch.zct.d
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var d = gch.zct.d
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while j >= 0:
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while j >= 0:
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if d[j] == ol:
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if d[j] == ol:
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#writecell("replaced old", ol)
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d[j] = res
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d[j] = res
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#writecell("replaced new", res)
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break
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break
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dec(j)
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dec(j)
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if ol.isBitUp(rcInCycleRoots):
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if ol.isBitUp(rcInCycleRoots):
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for i in 0 .. <gch.cycleRoots.len:
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for i in 0 .. <gch.cycleRoots.len:
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if gch.cycleRoots.d[i] == ol:
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if gch.cycleRoots.d[i] == ol:
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#writecell("evicted cycleroot", ol)
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eraseAt(gch.cycleRoots, i)
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eraseAt(gch.cycleRoots, i)
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freeCell(gch, ol)
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freeCell(gch, ol)
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@ -785,11 +777,9 @@ proc collectCycles(gch: var TGcHeap) =
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if gch.cycleRoots.len == 0: return
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if gch.cycleRoots.len == 0: return
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gch.stat.cycleTableSize = max(gch.stat.cycleTableSize, gch.cycleRoots.len)
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gch.stat.cycleTableSize = max(gch.stat.cycleTableSize, gch.cycleRoots.len)
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#c_printf "collect cycles table:\n"
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when CollectCyclesStats:
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#for i in 0 .. <gch.cycleRoots.len:
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let l0 = gch.cycleRoots.len
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# writecell("CROOT ", gch.cycleRoots.d[i])
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let tStart = getTicks()
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let l0 = gch.cycleRoots.len
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let tStart = getTicks()
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var
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var
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decrefs = 0
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decrefs = 0
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@ -826,7 +816,9 @@ proc collectCycles(gch: var TGcHeap) =
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earlyMarkAliveRec(c)
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earlyMarkAliveRec(c)
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earlyMarkAlive(gch.decStack)
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earlyMarkAlive(gch.decStack)
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let tAfterEarlyMarkAlive = getTicks()
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when CollectCyclesStats:
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let tAfterEarlyMarkAlive = getTicks()
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template recursiveDecRef(cell) =
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template recursiveDecRef(cell) =
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let startLen = gch.tempStack.len
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let startLen = gch.tempStack.len
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@ -843,7 +835,6 @@ proc collectCycles(gch: var TGcHeap) =
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inc decrefs
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inc decrefs
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if c.color != rcDecRefApplied:
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if c.color != rcDecRefApplied:
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c.setColor rcDecRefApplied
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c.setColor rcDecRefApplied
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# writeCell("decref", c)
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c.forAllChildren waPush
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c.forAllChildren waPush
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template markRoots(roots) =
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template markRoots(roots) =
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@ -862,9 +853,10 @@ proc collectCycles(gch: var TGcHeap) =
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freeCell(gch, c)
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freeCell(gch, c)
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markRoots(gch.cycleRoots)
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markRoots(gch.cycleRoots)
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let tAfterMark = getTicks()
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c_printf "COLLECT CYCLES %d: %d/%d\n", gcCollectionIdx, gch.cycleRoots.len, l0
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when CollectCyclesStats:
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let tAfterMark = getTicks()
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c_printf "COLLECT CYCLES %d: %d/%d\n", gcCollectionIdx, gch.cycleRoots.len, l0
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template recursiveMarkAlive(cell) =
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template recursiveMarkAlive(cell) =
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let startLen = gch.tempStack.len
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let startLen = gch.tempStack.len
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@ -877,7 +869,6 @@ proc collectCycles(gch: var TGcHeap) =
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if ignoreObject(c): continue
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if ignoreObject(c): continue
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inc c.refcount, rcIncrement
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inc c.refcount, rcIncrement
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inc increfs
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inc increfs
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# writeCell("mark alive", c)
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if c.color != rcAlive:
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if c.color != rcAlive:
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c.setColor rcAlive
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c.setColor rcAlive
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@ -905,7 +896,9 @@ proc collectCycles(gch: var TGcHeap) =
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c.forAllChildren waPush
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c.forAllChildren waPush
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scanRoots(gch.cycleRoots)
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scanRoots(gch.cycleRoots)
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let tAfterScan = getTicks()
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when CollectCyclesStats:
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let tAfterScan = getTicks()
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template collectDead(roots) =
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template collectDead(roots) =
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for i in 0 .. <roots.len:
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for i in 0 .. <roots.len:
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@ -938,17 +931,18 @@ proc collectCycles(gch: var TGcHeap) =
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freeCell(gch, gch.freeStack.d[i])
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freeCell(gch, gch.freeStack.d[i])
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collectDead(gch.cycleRoots)
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collectDead(gch.cycleRoots)
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let tFinal = getTicks()
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cprintf "times:\n early mark alive: %d ms\n mark: %d ms\n scan: %d ms\n collect: %d ms\n decrefs: %d\n increfs: %d\n marked dead: %d\n collected: %d\n",
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when CollectCyclesStats:
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(tAfterEarlyMarkAlive - tStart) div 1_000_000,
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let tFinal = getTicks()
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(tAfterMark - tAfterEarlyMarkAlive) div 1_000_000,
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cprintf "times:\n early mark alive: %d ms\n mark: %d ms\n scan: %d ms\n collect: %d ms\n decrefs: %d\n increfs: %d\n marked dead: %d\n collected: %d\n",
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(tAfterScan - tAfterMark) div 1_000_000,
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(tAfterEarlyMarkAlive - tStart) div 1_000_000,
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(tFinal - tAfterScan) div 1_000_000,
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(tAfterMark - tAfterEarlyMarkAlive) div 1_000_000,
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decrefs,
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(tAfterScan - tAfterMark) div 1_000_000,
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increfs,
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(tFinal - tAfterScan) div 1_000_000,
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maybedeads,
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decrefs,
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collected
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increfs,
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||||||
|
maybedeads,
|
||||||
|
collected
|
||||||
|
|
||||||
Deinit(gch.cycleRoots)
|
Deinit(gch.cycleRoots)
|
||||||
Init(gch.cycleRoots)
|
Init(gch.cycleRoots)
|
||||||
|
|
@ -963,20 +957,7 @@ proc collectCycles(gch: var TGcHeap) =
|
||||||
# CollectZCT may add new cycle candidates and we may decide to loop here
|
# CollectZCT may add new cycle candidates and we may decide to loop here
|
||||||
# if gch.cycleRoots.len > 0: repeat
|
# if gch.cycleRoots.len > 0: repeat
|
||||||
|
|
||||||
# quit 1
|
|
||||||
|
|
||||||
var gcDebugging* = false
|
var gcDebugging* = false
|
||||||
var vis*: proc (a: pointer, b: PNimType)
|
|
||||||
|
|
||||||
proc debugNode(n: ptr TNimNode) =
|
|
||||||
c_fprintf(c_stdout, "node %s\n", n.name)
|
|
||||||
for i in 0..n.len-1:
|
|
||||||
debugNode(n.sons[i])
|
|
||||||
|
|
||||||
proc debugTyp(x: PNimType) =
|
|
||||||
c_fprintf(c_stdout, "type %d\n", x.kind)
|
|
||||||
if x.node != nil:
|
|
||||||
debugNode(x.node)
|
|
||||||
|
|
||||||
var seqdbg* : proc (s: PGenericSeq) {.cdecl.}
|
var seqdbg* : proc (s: PGenericSeq) {.cdecl.}
|
||||||
|
|
||||||
|
|
@ -992,7 +973,7 @@ proc gcMark(gch: var TGcHeap, p: pointer) {.inline.} =
|
||||||
# mark the cell:
|
# mark the cell:
|
||||||
if objStart.isBitDown(rcReallyDead):
|
if objStart.isBitDown(rcReallyDead):
|
||||||
if gcDebugging:
|
if gcDebugging:
|
||||||
writeCell("marking ", objStart)
|
# writeCell("marking ", objStart)
|
||||||
else:
|
else:
|
||||||
inc objStart.refcount, rcIncrement
|
inc objStart.refcount, rcIncrement
|
||||||
gch.decStack.add objStart
|
gch.decStack.add objStart
|
||||||
|
|
@ -1174,18 +1155,14 @@ proc releaseCell(gch: var TGcHeap, cell: PCell) =
|
||||||
prepareDealloc(cell)
|
prepareDealloc(cell)
|
||||||
cell.setColor rcReallyDead
|
cell.setColor rcReallyDead
|
||||||
|
|
||||||
#writecell("RELEASING ", cell)
|
|
||||||
|
|
||||||
let l1 = gch.tempStack.len
|
let l1 = gch.tempStack.len
|
||||||
cell.forAllChildren waPush
|
cell.forAllChildren waPush
|
||||||
let l2 = gch.tempStack.len
|
let l2 = gch.tempStack.len
|
||||||
for i in l1 .. <l2:
|
for i in l1 .. <l2:
|
||||||
var cc = gch.tempStack.d[i]
|
var cc = gch.tempStack.d[i]
|
||||||
#writecell("SON ", cc)
|
|
||||||
if cc.refcount--(LocalHeap):
|
if cc.refcount--(LocalHeap):
|
||||||
releaseCell(gch, cc)
|
releaseCell(gch, cc)
|
||||||
else:
|
else:
|
||||||
#writecell("crashy", cc)
|
|
||||||
if canbeCycleRoot(cc):
|
if canbeCycleRoot(cc):
|
||||||
addCycleRoot(gch.cycleRoots, cc)
|
addCycleRoot(gch.cycleRoots, cc)
|
||||||
|
|
||||||
|
|
@ -1203,10 +1180,6 @@ proc releaseCell(gch: var TGcHeap, cell: PCell) =
|
||||||
# We can ignore it now as the ZCT cleaner will reach it soon.
|
# We can ignore it now as the ZCT cleaner will reach it soon.
|
||||||
|
|
||||||
proc CollectZCT(gch: var TGcHeap): bool =
|
proc CollectZCT(gch: var TGcHeap): bool =
|
||||||
#cprintf "ZCT TABLE START:\n"
|
|
||||||
#for i in 0 .. <gch.zct.len:
|
|
||||||
# writecell("ZCT CELL", gch.zct.d[i])
|
|
||||||
#cprintf "ZCT TABLE END\n"
|
|
||||||
const workPackage = 100
|
const workPackage = 100
|
||||||
var L = addr(gch.zct.len)
|
var L = addr(gch.zct.len)
|
||||||
|
|
||||||
|
|
@ -1217,14 +1190,10 @@ proc CollectZCT(gch: var TGcHeap): bool =
|
||||||
|
|
||||||
while L[] > 0:
|
while L[] > 0:
|
||||||
var c = gch.zct.d[0]
|
var c = gch.zct.d[0]
|
||||||
if c.isBitDown(rcZct):
|
sysAssert c.isBitUp(rcZct), "CollectZCT: rcZct missing!"
|
||||||
writecell("BAD ZCT", c)
|
|
||||||
quit 1
|
|
||||||
# writecell("ZCT PROCESS", c)
|
|
||||||
sysAssert(isAllocatedPtr(gch.region, c), "CollectZCT: isAllocatedPtr")
|
sysAssert(isAllocatedPtr(gch.region, c), "CollectZCT: isAllocatedPtr")
|
||||||
# remove from ZCT:
|
|
||||||
sysAssert((c.refcount and rcZct) == rcZct, "collectZCT")
|
|
||||||
|
|
||||||
|
# remove from ZCT:
|
||||||
c.clearBit(rcZct)
|
c.clearBit(rcZct)
|
||||||
gch.zct.d[0] = gch.zct.d[L[] - 1]
|
gch.zct.d[0] = gch.zct.d[L[] - 1]
|
||||||
dec(L[])
|
dec(L[])
|
||||||
|
|
@ -1238,13 +1207,9 @@ proc CollectZCT(gch: var TGcHeap): bool =
|
||||||
# freed. **KEEP THIS IN MIND WHEN MAKING THIS INCREMENTAL!**
|
# freed. **KEEP THIS IN MIND WHEN MAKING THIS INCREMENTAL!**
|
||||||
if c.color == rcRetiredBuffer:
|
if c.color == rcRetiredBuffer:
|
||||||
if c.isBitDown(rcInCycleRoots):
|
if c.isBitDown(rcInCycleRoots):
|
||||||
# writecell("retired buffer", c)
|
|
||||||
freeCell(gch, c)
|
freeCell(gch, c)
|
||||||
else:
|
else:
|
||||||
if c.color == rcReallyDead:
|
# if c.color == rcReallyDead: writeCell("ReallyDead in ZCT?", c)
|
||||||
# writeCell("ReallyDead in ZCT?", c)
|
|
||||||
|
|
||||||
# writecell("bad cell in zct", c)
|
|
||||||
releaseCell(gch, c)
|
releaseCell(gch, c)
|
||||||
when withRealtime:
|
when withRealtime:
|
||||||
if steps == 0:
|
if steps == 0:
|
||||||
|
|
@ -1270,7 +1235,6 @@ proc unmarkStackAndRegisters(gch: var TGcHeap) =
|
||||||
sysAssert c.typ != nil, "unmarkStackAndRegisters 2"
|
sysAssert c.typ != nil, "unmarkStackAndRegisters 2"
|
||||||
|
|
||||||
if c.color == rcRetiredBuffer:
|
if c.color == rcRetiredBuffer:
|
||||||
# writecell("unmark retired", c)
|
|
||||||
continue
|
continue
|
||||||
|
|
||||||
# XXX no need for an atomic dec here:
|
# XXX no need for an atomic dec here:
|
||||||
|
|
@ -1284,11 +1248,8 @@ proc unmarkStackAndRegisters(gch: var TGcHeap) =
|
||||||
# a leak if it's orphaned through the stack reference
|
# a leak if it's orphaned through the stack reference
|
||||||
# that's because the write-barrier won't be executed for stack
|
# that's because the write-barrier won't be executed for stack
|
||||||
# locations
|
# locations
|
||||||
#writeCell("restoring balance cycle roots", c)
|
|
||||||
addCycleRoot(gch.cycleRoots, c)
|
addCycleRoot(gch.cycleRoots, c)
|
||||||
|
|
||||||
#writecell("unmark stack cell", c)
|
|
||||||
|
|
||||||
gch.decStack.len = 0
|
gch.decStack.len = 0
|
||||||
|
|
||||||
proc collectCTBody(gch: var TGcHeap) =
|
proc collectCTBody(gch: var TGcHeap) =
|
||||||
|
|
|
||||||
|
|
@ -14,14 +14,14 @@
|
||||||
{.push checks:off.}
|
{.push checks:off.}
|
||||||
|
|
||||||
const
|
const
|
||||||
debugGC = true # we wish to debug the GC...
|
debugGC = false # we wish to debug the GC...
|
||||||
logGC = false
|
logGC = false
|
||||||
traceGC = true # extensive debugging
|
traceGC = false # extensive debugging
|
||||||
alwaysCycleGC = false
|
alwaysCycleGC = false
|
||||||
alwaysGC = false # collect after every memory allocation (for debugging)
|
alwaysGC = false # collect after every memory allocation (for debugging)
|
||||||
leakDetector = false
|
leakDetector = false
|
||||||
overwriteFree = false
|
overwriteFree = false
|
||||||
trackAllocationSource = true or leakDetector
|
trackAllocationSource = leakDetector
|
||||||
|
|
||||||
cycleGC = true # (de)activate the cycle GC
|
cycleGC = true # (de)activate the cycle GC
|
||||||
reallyDealloc = true # for debugging purposes this can be set to false
|
reallyDealloc = true # for debugging purposes this can be set to false
|
||||||
|
|
|
||||||
|
|
@ -213,7 +213,6 @@ proc setLengthSeq(seq: PGenericSeq, elemSize, newLen: int): PGenericSeq {.
|
||||||
doDecRef(gch.tempStack.d[i], LocalHeap, MaybeCyclic)
|
doDecRef(gch.tempStack.d[i], LocalHeap, MaybeCyclic)
|
||||||
gch.tempStack.len = len0
|
gch.tempStack.len = len0
|
||||||
|
|
||||||
# XXX add a proper addCycleRoot barrier here!
|
|
||||||
# and set the memory to nil:
|
# and set the memory to nil:
|
||||||
zeroMem(cast[pointer](cast[TAddress](result) +% GenericSeqSize +%
|
zeroMem(cast[pointer](cast[TAddress](result) +% GenericSeqSize +%
|
||||||
(newLen*%elemSize)), (result.len-%newLen) *% elemSize)
|
(newLen*%elemSize)), (result.len-%newLen) *% elemSize)
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue