Enable customizing PageShift to set PageSize for embedded targets (#19129)
* Enable customizing PageSize (via PageShift). This enables adjusting PageSize for embedded targets without abusing cpu16. * copy nimPageXYZ settings for mmpaptest * add docs for Nim manual * add docs for Nim manual * docs tweaks Co-authored-by: Jaremy Creechley <jaremy.creechley@panthalassa.com>
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doc/nimc.rst
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doc/nimc.rst
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@ -656,6 +656,30 @@ is not available but C's `malloc` is. You can use the `nimAllocPagesViaMalloc`
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define to use `malloc` instead of `mmap`. `nimAllocPagesViaMalloc` is currently
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define to use `malloc` instead of `mmap`. `nimAllocPagesViaMalloc` is currently
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only supported with `--gc:arc` or `--gc:orc`. (Since version 1.6)
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only supported with `--gc:arc` or `--gc:orc`. (Since version 1.6)
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nimPage256 / nimPage512 / nimPage1k
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===================================
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Adjust the page size for Nim's GC allocator. This enables using
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`nimAllocPagesViaMalloc` on devices with less RAM. The default
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page size requires too much RAM to work.
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Recommended settings:
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- < 32 kB of RAM use `nimPage256`
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- < 512 kB of RAM use `nimPage512`
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- < 2 MB of RAM use `nimPage1k`
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Initial testing hasn't shown much difference between 512B or 1kB page sizes
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in terms of performance or latency. Using `nimPages256` will limit the
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total amount of allocatable RAM.
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nimMemAlignTiny
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===============
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Sets `MemAlign` to `4` bytes which reduces the memory alignment
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to better match some embedded devices.
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Nim for realtime systems
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Nim for realtime systems
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========================
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========================
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@ -10,14 +10,18 @@
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# Page size of the system; in most cases 4096 bytes. For exotic OS or
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# Page size of the system; in most cases 4096 bytes. For exotic OS or
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# CPU this needs to be changed:
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# CPU this needs to be changed:
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const
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const
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PageShift = when defined(cpu16): 8 else: 12 # \
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PageShift = when defined(nimPage256) or defined(cpu16): 8
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# my tests showed no improvements for using larger page sizes.
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elif defined(nimPage512): 9
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elif defined(nimPage1k): 10
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else: 12 # \ # my tests showed no improvements for using larger page sizes.
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PageSize = 1 shl PageShift
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PageSize = 1 shl PageShift
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PageMask = PageSize-1
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PageMask = PageSize-1
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MemAlign = # also minimal allocatable memory block
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MemAlign = # also minimal allocatable memory block
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when defined(useMalloc):
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when defined(nimMemAlignTiny): 4
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elif defined(useMalloc):
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when defined(amd64): 16
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when defined(amd64): 16
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else: 8
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else: 8
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else: 16
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else: 16
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@ -19,8 +19,11 @@ proc `+!!`(p: pointer, size: int): pointer {.inline.} =
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result = cast[pointer](cast[int](p) + size)
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result = cast[pointer](cast[int](p) + size)
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const
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const
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PageShift = when defined(cpu16): 8 else: 12 # \
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PageShift = when defined(nimPage256) or defined(cpu16): 8
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# my tests showed no improvements for using larger page sizes.
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elif defined(nimPage512): 9
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elif defined(nimPage1k): 10
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else: 12 # \ # my tests showed no improvements for using larger page sizes.
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PageSize = 1 shl PageShift
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PageSize = 1 shl PageShift
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var p = osAllocPages(3 * PageSize)
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var p = osAllocPages(3 * PageSize)
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