Simplify cgen forward proc (#9635)

* cgen: remove module resetting (unused)

* cgen: keep single list of forwarded modules

fewer counters to keep track of

* cgen: fix module lookup
This commit is contained in:
Jacek Sieka 2018-11-07 14:08:10 -06:00 • committed by Arne Döring
commit b1ad5fd7da
2 changed files with 24 additions and 71 deletions

View file

@ -112,7 +112,7 @@ type
mainModProcs*, mainModInit*, otherModsInit*, mainDatInit*: Rope
mapping*: Rope # the generated mapping file (if requested)
modules*: seq[BModule] # list of all compiled modules
forwardedProcsCounter*: int
forwardedProcs*: seq[PSym] # proc:s that did not yet have a body
generatedHeader*: BModule
breakPointId*: int
breakpoints*: Rope # later the breakpoints are inserted into the main proc
@ -150,7 +150,6 @@ type
preInitProc*: BProc # code executed before the init proc
typeStack*: TTypeSeq # used for type generation
dataCache*: TNodeTable
forwardedProcs*: TSymSeq # keep forwarded procs here
typeNodes*, nimTypes*: int # used for type info generation
typeNodesName*, nimTypesName*: Rope # used for type info generation
labels*: Natural # for generating unique module-scope names
@ -188,12 +187,12 @@ proc newProc*(prc: PSym, module: BModule): BProc =
result.sigConflicts = initCountTable[string]()
proc newModuleList*(g: ModuleGraph): BModuleList =
BModuleList(modules: @[], typeInfoMarker: initTable[SigHash, Rope](), config: g.config,
graph: g, nimtvDeps: @[], nimtvDeclared: initIntSet())
BModuleList(typeInfoMarker: initTable[SigHash, Rope](), config: g.config,
graph: g, nimtvDeclared: initIntSet())
iterator cgenModules*(g: BModuleList): BModule =
for i in 0..high(g.modules):
for m in g.modules:
# ultimately, we are iterating over the file ids here.
# some "files" won't have an associated cgen module (like stdin)
# and we must skip over them.
if g.modules[i] != nil: yield g.modules[i]
if m != nil: yield m