Simplify cgen forward proc (#9635)
* cgen: remove module resetting (unused) * cgen: keep single list of forwarded modules fewer counters to keep track of * cgen: fix module lookup
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2 changed files with 24 additions and 71 deletions
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@ -45,8 +45,7 @@ when options.hasTinyCBackend:
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# implementation
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# implementation
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proc addForwardedProc(m: BModule, prc: PSym) =
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proc addForwardedProc(m: BModule, prc: PSym) =
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m.forwardedProcs.add(prc)
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m.g.forwardedProcs.add(prc)
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inc(m.g.forwardedProcsCounter)
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proc findPendingModule(m: BModule, s: PSym): BModule =
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proc findPendingModule(m: BModule, s: PSym): BModule =
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var ms = getModule(s)
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var ms = getModule(s)
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@ -1394,7 +1393,6 @@ proc rawNewModule(g: BModuleList; module: PSym, filename: AbsoluteFile): BModule
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result.preInitProc = newPreInitProc(result)
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result.preInitProc = newPreInitProc(result)
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initNodeTable(result.dataCache)
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initNodeTable(result.dataCache)
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result.typeStack = @[]
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result.typeStack = @[]
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result.forwardedProcs = @[]
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result.typeNodesName = getTempName(result)
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result.typeNodesName = getTempName(result)
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result.nimTypesName = getTempName(result)
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result.nimTypesName = getTempName(result)
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# no line tracing for the init sections of the system module so that we
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# no line tracing for the init sections of the system module so that we
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@ -1410,49 +1408,6 @@ proc nullify[T](arr: var T) =
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for i in low(arr)..high(arr):
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for i in low(arr)..high(arr):
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arr[i] = Rope(nil)
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arr[i] = Rope(nil)
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proc resetModule*(m: BModule) =
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# between two compilations in CAAS mode, we can throw
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# away all the data that was written to disk
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m.headerFiles = @[]
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m.declaredProtos = initIntSet()
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m.forwTypeCache = initTable[SigHash, Rope]()
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m.initProc = newProc(nil, m)
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m.initProc.options = initProcOptions(m)
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m.preInitProc = newPreInitProc(m)
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initNodeTable(m.dataCache)
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m.typeStack = @[]
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m.forwardedProcs = @[]
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m.typeNodesName = getTempName(m)
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m.nimTypesName = getTempName(m)
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if sfSystemModule in m.module.flags:
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incl m.flags, preventStackTrace
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else:
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excl m.flags, preventStackTrace
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nullify m.s
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m.typeNodes = 0
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m.nimTypes = 0
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nullify m.extensionLoaders
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# indicate that this is now cached module
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# the cache will be invalidated by nullifying gModules
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#m.fromCache = true
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m.g = nil
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# we keep only the "merge info" information for the module
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# and the properties that can't change:
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# m.filename
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# m.cfilename
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# m.isHeaderFile
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# m.module ?
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# m.typeCache
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# m.declaredThings
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# m.typeInfoMarker
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# m.labels
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# m.FrameDeclared
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proc resetCgenModules*(g: BModuleList) =
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for m in cgenModules(g): resetModule(m)
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proc rawNewModule(g: BModuleList; module: PSym; conf: ConfigRef): BModule =
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proc rawNewModule(g: BModuleList; module: PSym; conf: ConfigRef): BModule =
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result = rawNewModule(g, module, AbsoluteFile toFullPath(conf, module.position.FileIndex))
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result = rawNewModule(g, module, AbsoluteFile toFullPath(conf, module.position.FileIndex))
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@ -1531,20 +1486,6 @@ proc myProcess(b: PPassContext, n: PNode): PNode =
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let tranformed_n = transformStmt(m.g.graph, m.module, n)
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let tranformed_n = transformStmt(m.g.graph, m.module, n)
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genStmts(m.initProc, tranformed_n)
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genStmts(m.initProc, tranformed_n)
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proc finishModule(m: BModule) =
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var i = 0
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while i <= high(m.forwardedProcs):
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# Note: ``genProc`` may add to ``m.forwardedProcs``, so we cannot use
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# a ``for`` loop here
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var prc = m.forwardedProcs[i]
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if sfForward in prc.flags:
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internalError(m.config, prc.info, "still forwarded: " & prc.name.s)
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genProcNoForward(m, prc)
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inc(i)
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assert(m.g.forwardedProcsCounter >= i)
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dec(m.g.forwardedProcsCounter, i)
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setLen(m.forwardedProcs, 0)
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proc shouldRecompile(m: BModule; code: Rope, cfile: Cfile): bool =
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proc shouldRecompile(m: BModule; code: Rope, cfile: Cfile): bool =
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result = true
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result = true
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if optForceFullMake notin m.config.globalOptions:
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if optForceFullMake notin m.config.globalOptions:
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@ -1640,12 +1581,26 @@ proc myClose(graph: ModuleGraph; b: PPassContext, n: PNode): PNode =
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registerModuleToMain(m.g, m.module)
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registerModuleToMain(m.g, m.module)
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if sfMainModule in m.module.flags:
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if sfMainModule in m.module.flags:
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if m.g.forwardedProcsCounter == 0:
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if m.g.forwardedProcs.len == 0:
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incl m.flags, objHasKidsValid
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incl m.flags, objHasKidsValid
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let disp = generateMethodDispatchers(graph)
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let disp = generateMethodDispatchers(graph)
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for x in disp: genProcAux(m, x.sym)
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for x in disp: genProcAux(m, x.sym)
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genMainProc(m)
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genMainProc(m)
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proc genForwardedProcs(g: BModuleList) =
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# Forward declared proc:s lack bodies when first encountered, so they're given
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# a second pass here
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# Note: ``genProcNoForward`` may add to ``forwardedProcs``
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while g.forwardedProcs.len > 0:
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let
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prc = g.forwardedProcs.pop()
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ms = getModule(prc)
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m = g.modules[ms.position]
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if sfForward in prc.flags:
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internalError(m.config, prc.info, "still forwarded: " & prc.name.s)
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genProcNoForward(m, prc)
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proc cgenWriteModules*(backend: RootRef, config: ConfigRef) =
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proc cgenWriteModules*(backend: RootRef, config: ConfigRef) =
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let g = BModuleList(backend)
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let g = BModuleList(backend)
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# we need to process the transitive closure because recursive module
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# we need to process the transitive closure because recursive module
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@ -1655,10 +1610,9 @@ proc cgenWriteModules*(backend: RootRef, config: ConfigRef) =
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let (outDir, _, _) = splitFile(config.outfile)
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let (outDir, _, _) = splitFile(config.outfile)
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if not outDir.isEmpty:
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if not outDir.isEmpty:
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createDir(outDir)
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createDir(outDir)
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if g.generatedHeader != nil: finishModule(g.generatedHeader)
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while g.forwardedProcsCounter > 0:
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genForwardedProcs(g)
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for m in cgenModules(g):
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finishModule(m)
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for m in cgenModules(g):
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for m in cgenModules(g):
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m.writeModule(pending=true)
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m.writeModule(pending=true)
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writeMapping(config, g.mapping)
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writeMapping(config, g.mapping)
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@ -112,7 +112,7 @@ type
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mainModProcs*, mainModInit*, otherModsInit*, mainDatInit*: Rope
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mainModProcs*, mainModInit*, otherModsInit*, mainDatInit*: Rope
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mapping*: Rope # the generated mapping file (if requested)
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mapping*: Rope # the generated mapping file (if requested)
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modules*: seq[BModule] # list of all compiled modules
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modules*: seq[BModule] # list of all compiled modules
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forwardedProcsCounter*: int
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forwardedProcs*: seq[PSym] # proc:s that did not yet have a body
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generatedHeader*: BModule
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generatedHeader*: BModule
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breakPointId*: int
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breakPointId*: int
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breakpoints*: Rope # later the breakpoints are inserted into the main proc
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breakpoints*: Rope # later the breakpoints are inserted into the main proc
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@ -150,7 +150,6 @@ type
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preInitProc*: BProc # code executed before the init proc
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preInitProc*: BProc # code executed before the init proc
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typeStack*: TTypeSeq # used for type generation
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typeStack*: TTypeSeq # used for type generation
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dataCache*: TNodeTable
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dataCache*: TNodeTable
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forwardedProcs*: TSymSeq # keep forwarded procs here
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typeNodes*, nimTypes*: int # used for type info generation
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typeNodes*, nimTypes*: int # used for type info generation
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typeNodesName*, nimTypesName*: Rope # used for type info generation
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typeNodesName*, nimTypesName*: Rope # used for type info generation
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labels*: Natural # for generating unique module-scope names
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labels*: Natural # for generating unique module-scope names
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@ -188,12 +187,12 @@ proc newProc*(prc: PSym, module: BModule): BProc =
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result.sigConflicts = initCountTable[string]()
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result.sigConflicts = initCountTable[string]()
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proc newModuleList*(g: ModuleGraph): BModuleList =
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proc newModuleList*(g: ModuleGraph): BModuleList =
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BModuleList(modules: @[], typeInfoMarker: initTable[SigHash, Rope](), config: g.config,
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BModuleList(typeInfoMarker: initTable[SigHash, Rope](), config: g.config,
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graph: g, nimtvDeps: @[], nimtvDeclared: initIntSet())
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graph: g, nimtvDeclared: initIntSet())
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iterator cgenModules*(g: BModuleList): BModule =
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iterator cgenModules*(g: BModuleList): BModule =
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for i in 0..high(g.modules):
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for m in g.modules:
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# ultimately, we are iterating over the file ids here.
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# ultimately, we are iterating over the file ids here.
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# some "files" won't have an associated cgen module (like stdin)
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# some "files" won't have an associated cgen module (like stdin)
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# and we must skip over them.
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# and we must skip over them.
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if g.modules[i] != nil: yield g.modules[i]
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if m != nil: yield m
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