jyapayne/Nim
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

fixes #15939, fixes #15464, fixes #16169, fixes #16226 VM now supports addr(mystring[ind]) (index + index assignment) (#15987)

Browse source 
* fix #15939, fix #15464 VM now supports `addr(mystring[ind])` (index + index assignment), var char return etc
* cleanups
* cstring tests
* add test for bug #15464
* improve test coverage
This commit is contained in:
Timothee Cour 2020-12-03 07:55:43 -08:00 • committed by GitHub
commit c731f7ab14
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
5 changed files with 94 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

21
compiler/vm.nim
View file

@ -20,6 +20,7 @@ import
from semfold import leValueConv, ordinalValToString
from evaltempl import evalTemplate
from magicsys import getSysType
const
traceCode = defined(nimVMDebug)
@ -123,7 +124,7 @@ proc derefPtrToReg(address: BiggestInt, typ: PType, r: var TFullReg, isAssign: b
else:
r.ensureKind(rkind)
let val = cast[ptr T](address)[]
when T is SomeInteger:
when T is SomeInteger | char:
r.field = BiggestInt(val)
else:
r.field = val
@ -131,6 +132,7 @@ proc derefPtrToReg(address: BiggestInt, typ: PType, r: var TFullReg, isAssign: b
## see also typeinfo.getBiggestInt
case typ.kind
of tyChar: fun(intVal, char, rkInt)
of tyInt: fun(intVal, int, rkInt)
of tyInt8: fun(intVal, int8, rkInt)
of tyInt16: fun(intVal, int16, rkInt)
@ -677,6 +679,23 @@ proc rawExecute(c: PCtx, start: int, tos: PStackFrame): TFullReg =
regs[ra].intVal = s[idx].ord
else:
stackTrace(c, tos, pc, formatErrorIndexBound(idx, s.len-1))
of opcLdStrIdxAddr:
# a = addr(b[c]); similar to opcLdArrAddr
decodeBC(rkNode)
if regs[rc].intVal > high(int):
stackTrace(c, tos, pc, formatErrorIndexBound(regs[rc].intVal, high(int)))
let idx = regs[rc].intVal.int
let s = regs[rb].node.strVal.addr # or `byaddr`
if idx <% s[].len:
# `makePtrType` not accessible from vm.nim
let typ = newType(tyPtr, nextId c.idgen, c.module.owner)
typ.add getSysType(c.graph, c.debug[pc], tyChar)
let node = newNodeIT(nkIntLit, c.debug[pc], typ) # xxx nkPtrLit
node.intVal = cast[int](s[][idx].addr)
node.flags.incl nfIsPtr
regs[ra].node = node
else:
stackTrace(c, tos, pc, formatErrorIndexBound(idx, s[].len-1))
of opcWrArr:
# a[b] = c
decodeBC(rkNode)

1
compiler/vmdef.nim
View file

@ -78,6 +78,7 @@ type
opcWrDeref,
opcWrStrIdx,
opcLdStrIdx, # a = b[c]
opcLdStrIdxAddr, # a = addr(b[c])
opcAddInt,
opcAddImmInt,

10
compiler/vmgen.nim
View file

@ -1654,8 +1654,8 @@ proc genArrAccessOpcode(c: PCtx; n: PNode; dest: var TDest; opc: TOpcode;
let a = c.genx(n[0], flags)
let b = c.genIndex(n[1], n[0].typ)
if dest < 0: dest = c.getTemp(n.typ)
if opc == opcLdArr and {gfNodeAddr} * flags != {}:
c.gABC(n, opcLdArrAddr, dest, a, b)
if opc in {opcLdArrAddr, opcLdStrIdxAddr} and gfNodeAddr in flags:
c.gABC(n, opc, dest, a, b)
elif needsRegLoad():
var cc = c.getTemp(n.typ)
c.gABC(n, opc, cc, a, b)
@ -1749,11 +1749,13 @@ proc genCheckedObjAccess(c: PCtx; n: PNode; dest: var TDest; flags: TGenFlags) =
proc genArrAccess(c: PCtx; n: PNode; dest: var TDest; flags: TGenFlags) =
let arrayType = n[0].typ.skipTypes(abstractVarRange-{tyTypeDesc}).kind
if arrayType in {tyString, tyCString}:
genArrAccessOpcode(c, n, dest, opcLdStrIdx, {})
let opc = if gfNodeAddr in flags: opcLdStrIdxAddr else: opcLdStrIdx
genArrAccessOpcode(c, n, dest, opc, flags)
elif arrayType == tyTypeDesc:
c.genTypeLit(n.typ, dest)
else:
genArrAccessOpcode(c, n, dest, opcLdArr, flags)
let opc = if gfNodeAddr in flags: opcLdArrAddr else: opcLdArr
genArrAccessOpcode(c, n, dest, opc, flags)
proc getNullValueAux(t: PType; obj: PNode, result: PNode; conf: ConfigRef; currPosition: var int) =
if t != nil and t.len > 0 and t[0] != nil: