Merge pull request #1608 from rbehrends/fix-atomics
Various atomics fixes for gcc/clang.
This commit is contained in:
commit
eaa5a2599f
1 changed files with 26 additions and 20 deletions
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@ -13,24 +13,30 @@
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const someGcc = defined(gcc) or defined(llvm_gcc) or defined(clang)
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const someGcc = defined(gcc) or defined(llvm_gcc) or defined(clang)
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when someGcc and hasThreadSupport:
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when someGcc and hasThreadSupport:
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type
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type AtomMemModel* = distinct cint
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AtomMemModel* = enum
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var ATOMIC_RELAXED* {.importc: "__ATOMIC_RELAXED", nodecl.}: AtomMemModel
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ATOMIC_RELAXED, ## No barriers or synchronization.
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## No barriers or synchronization.
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ATOMIC_CONSUME, ## Data dependency only for both barrier and
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var ATOMIC_CONSUME* {.importc: "__ATOMIC_CONSUME", nodecl.}: AtomMemModel
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## Data dependency only for both barrier and
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## synchronization with another thread.
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## synchronization with another thread.
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ATOMIC_ACQUIRE, ## Barrier to hoisting of code and synchronizes with
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var ATOMIC_ACQUIRE* {.importc: "__ATOMIC_ACQUIRE", nodecl.}: AtomMemModel
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## Barrier to hoisting of code and synchronizes with
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## release (or stronger)
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## release (or stronger)
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## semantic stores from another thread.
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## semantic stores from another thread.
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ATOMIC_RELEASE, ## Barrier to sinking of code and synchronizes with
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var ATOMIC_RELEASE* {.importc: "__ATOMIC_RELEASE", nodecl.}: AtomMemModel
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## Barrier to sinking of code and synchronizes with
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## acquire (or stronger)
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## acquire (or stronger)
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## semantic loads from another thread.
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## semantic loads from another thread.
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ATOMIC_ACQ_REL, ## Full barrier in both directions and synchronizes
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var ATOMIC_ACQ_REL* {.importc: "__ATOMIC_ACQ_REL", nodecl.}: AtomMemModel
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## Full barrier in both directions and synchronizes
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## with acquire loads
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## with acquire loads
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## and release stores in another thread.
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## and release stores in another thread.
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ATOMIC_SEQ_CST ## Full barrier in both directions and synchronizes
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var ATOMIC_SEQ_CST* {.importc: "__ATOMIC_SEQ_CST", nodecl.}: AtomMemModel
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## Full barrier in both directions and synchronizes
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## with acquire loads
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## with acquire loads
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## and release stores in all threads.
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## and release stores in all threads.
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type
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TAtomType* = TNumber|pointer|ptr|char
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TAtomType* = TNumber|pointer|ptr|char
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## Type Class representing valid types for use with atomic procs
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## Type Class representing valid types for use with atomic procs
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@ -166,14 +172,14 @@ else:
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result = p[]
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result = p[]
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proc atomicInc*(memLoc: var int, x: int = 1): int =
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proc atomicInc*(memLoc: var int, x: int = 1): int =
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when defined(gcc) and hasThreadSupport:
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when someGcc and hasThreadSupport:
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result = atomic_add_fetch(memLoc.addr, x, ATOMIC_RELAXED)
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result = atomic_add_fetch(memLoc.addr, x, ATOMIC_RELAXED)
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else:
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else:
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inc(memLoc, x)
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inc(memLoc, x)
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result = memLoc
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result = memLoc
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proc atomicDec*(memLoc: var int, x: int = 1): int =
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proc atomicDec*(memLoc: var int, x: int = 1): int =
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when defined(gcc) and hasThreadSupport:
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when someGcc and hasThreadSupport:
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when declared(atomic_sub_fetch):
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when declared(atomic_sub_fetch):
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result = atomic_sub_fetch(memLoc.addr, x, ATOMIC_RELAXED)
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result = atomic_sub_fetch(memLoc.addr, x, ATOMIC_RELAXED)
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else:
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else:
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@ -196,7 +202,7 @@ else:
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# XXX is this valid for 'int'?
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# XXX is this valid for 'int'?
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when (defined(x86) or defined(amd64)) and (defined(gcc) or defined(llvm_gcc)):
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when (defined(x86) or defined(amd64)) and someGcc:
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proc cpuRelax {.inline.} =
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proc cpuRelax {.inline.} =
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{.emit: """asm volatile("pause" ::: "memory");""".}
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{.emit: """asm volatile("pause" ::: "memory");""".}
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elif (defined(x86) or defined(amd64)) and defined(vcc):
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elif (defined(x86) or defined(amd64)) and defined(vcc):
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