Revert "Added VHDL syntax highlighting, and example code. issue #1642"
This reverts commit 56a37a4053.
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56a37a4053
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@ -140,7 +140,6 @@ var supportedModes = {
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VBScript: ["vbs"],
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Velocity: ["vm"],
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Verilog: ["v|vh|sv|svh"],
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VHDL: ["vhd|vhdl"],
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XML: ["xml|rdf|rss|wsdl|xslt|atom|mathml|mml|xul|xbl"],
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XQuery: ["xq"],
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YAML: ["yaml|yml"]
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