diff --git a/demo/kitchen-sink/docs/vhdl.vhd b/demo/kitchen-sink/docs/vhdl.vhd new file mode 100644 index 00000000..662375e8 --- /dev/null +++ b/demo/kitchen-sink/docs/vhdl.vhd @@ -0,0 +1,34 @@ +library IEEE +user IEEE.std_logic_1164.all; +use IEEE.numeric_std.all; + +entity COUNT16 is + + port ( + cOut :out std_logic_vector(15 downto 0); -- counter output + clkEn :in std_logic; -- count enable + clk :in std_logic; -- clock input + rst :in std_logic -- reset input + ); + +end entity; + +architecture count_rtl of COUNT16 is + signal count :std_logic_vector (15 downto 0); + +begin + process (clk, rst) begin + + if(rst = '1') then + count <= (others=>'0'); + elsif(rising_edge(clk)) then + if(clkEn = '1') then + count <= count + 1; + end if; + end if; + + end process; + cOut <= count; + +end architecture; + \ No newline at end of file diff --git a/lib/ace/mode/vhdl.js b/lib/ace/mode/vhdl.js new file mode 100644 index 00000000..40449863 --- /dev/null +++ b/lib/ace/mode/vhdl.js @@ -0,0 +1,23 @@ +define(function(require, exports, module) { +"use strict"; + +var oop = require("../lib/oop"); +var TextMode = require("./text").Mode; +var Tokenizer = require("../tokenizer").Tokenizer; +var VHDLHighlightRules = require("./vhdl_highlight_rules").VHDLHighlightRules; +var Range = require("../range").Range; + +var Mode = function() { + this.HighlightRules = VHDLHighlightRules; +}; +oop.inherits(Mode, TextMode); + +(function() { + + this.lineCommentStart = "--"; + +}).call(Mode.prototype); + +exports.Mode = Mode; + +}); \ No newline at end of file diff --git a/lib/ace/mode/vhdl_highlight_rules.js b/lib/ace/mode/vhdl_highlight_rules.js new file mode 100644 index 00000000..bdb04c24 --- /dev/null +++ b/lib/ace/mode/vhdl_highlight_rules.js @@ -0,0 +1,86 @@ +define(function(require, exports, module) { +"use strict"; + +var oop = require("../lib/oop"); +var TextHighlightRules = require("./text_highlight_rules").TextHighlightRules; + +var VHDLHighlightRules = function() { + + + + var keywords = "access|after|ailas|all|architecture|assert|attribute|"+ + "begin|block|buffer|bus|case|component|configuration|"+ + "disconnect|downto|else|elsif|end|entity|file|for|function|"+ + "generate|generic|guarded|if|impure|in|inertial|inout|is|"+ + "label|linkage|literal|loop|mapnew|next|of|on|open|"+ + "others|out|port|process|pure|range|record|reject|"+ + "report|return|select|shared|subtype|then|to|transport|"+ + "type|unaffected|united|until|wait|when|while|with"; + + var storageType = "bit|bit_vector|boolean|character|integer|line|natural|"+ + "positive|real|register|severity|signal|signed|"+ + "std_logic|std_logic_vector|string||text|time|unsigned|"+ + "variable"; + + var storageModifiers = "array|constant"; + + var keywordOperators = "abs|and|mod|nand|nor|not|rem|rol|ror|sla|sll|sra"+ + "srl|xnor|xor"; + + var builtinConstants = ( + "true|false|null" + ); + + + var keywordMapper = this.createKeywordMapper({ + "keyword.operator": keywordOperators, + "keyword": keywords, + "constant.language": builtinConstants, + "storage.modifier": storageModifiers, + "storage.type": storageType + }, "identifier", true); + + this.$rules = { + "start" : [ { + token : "comment", + regex : "--.*$" + }, { + token : "string", // " string + regex : '".*?"' + }, { + token : "string", // ' string + regex : "'.*?'" + }, { + token : "constant.numeric", // float + regex : "[+-]?\\d+(?:(?:\\.\\d*)?(?:[eE][+-]?\\d+)?)?\\b" + }, { + token : "keyword", // pre-compiler directives + regex : "\\s*(?:library|package|use)\\b", + }, { + token : keywordMapper, + regex : "[a-zA-Z_$][a-zA-Z0-9_$]*\\b" + }, { + token : "keyword.operator", + regex : "&|\\*|\\+|\\-|\\/|<|=|>|\\||=>|\\*\\*|:=|\\/=|>=|<=|<>" + }, { + token : "punctuation.operator", + regex : "\\'|\\:|\\,|\\;|\\." + },{ + token : "paren.lparen", + regex : "[[(]" + }, { + token : "paren.rparen", + regex : "[\\])]" + }, { + token : "text", + regex : "\\s+" + } ], + + + }; +}; + +oop.inherits(VHDLHighlightRules, TextHighlightRules); + +exports.VHDLHighlightRules = VHDLHighlightRules; +}); \ No newline at end of file diff --git a/lib/ace/snippets/vhdl.js b/lib/ace/snippets/vhdl.js new file mode 100644 index 00000000..fe5e708f --- /dev/null +++ b/lib/ace/snippets/vhdl.js @@ -0,0 +1,7 @@ +define(function(require, exports, module) { +"use strict"; + +exports.snippetText = require("../requirejs/text!./vhdl.snippets"); +exports.scope = "vhdl"; + +}); \ No newline at end of file diff --git a/lib/ace/snippets/vhdl.snippets b/lib/ace/snippets/vhdl.snippets new file mode 100644 index 00000000..e69de29b