fix spaces redundant trailing spaces and missing line break at EOF

llvm/core.py

@@ -211,7 +211,7 @@ class CCEnum(Enum):
     CC_X86_THISCALL  = ID.X86_ThisCall
     CC_PTX_KERNEL    = ID.PTX_Kernel
     CC_PTX_DEVICE    = ID.PTX_Device
-    
+
     if llvm.version <= (3, 3):
         CC_MBLAZE_INTR   = ID.MBLAZE_INTR
         CC_MBLAZE_SVOL   = ID.MBLAZE_SVOL
@@ -221,7 +221,7 @@ CCEnum.declare()
 # int predicates
 class ICMPEnum(Enum):
     prefix = 'ICMP_'
-    
+
     Predicate = api.llvm.CmpInst.Predicate
 
     ICMP_EQ         = Predicate.ICMP_EQ
@@ -953,7 +953,7 @@ class StructType(Type):
     def _get_name(self):
         if self._ptr.isLiteral():
            return ""
-        else:	
+        else:
            return self._ptr.getName()
 
     name = property(_get_name, _set_name)
@@ -1454,7 +1454,7 @@ class Argument(Value):
             attrbldr.addAttribute(attr)
             attrs = api.llvm.AttributeSet.get(context, 0, attrbldr)
             self._ptr.addAttr(attrs)
-        
+
             if attr not in self:
                 raise ValueError("Attribute %r is not valid for arg %s" %
                                  (attr, self))

llvm/llrt.py

@@ -38,7 +38,7 @@ def _replace_with(builder, inst, func):
 
 def load(arch):
     '''Load the LLRT module corresponding to the given architecture
-    Creates a new module and optimizes it using the information from 
+    Creates a new module and optimizes it using the information from
     the host machine.
     '''
     if arch != 'x86_64':

llvm/mc/__init__.py

@@ -191,12 +191,12 @@ class Disassembler(object):
         where the instruction bytes are from (not an offset into
         @bs). yields instructions in the form of (addr, data, inst) where
         addr is an integer, data is a tuple of integers and inst is an instance of
-        llvm.mc.Instr. @align specifies the byte alignment of instructions and 
+        llvm.mc.Instr. @align specifies the byte alignment of instructions and
         is only used if an un-decodable instruction is encountered, in which
         case the disassembler will skip the following bytes until the next
         aligned address. if @align is unspecified, the default alignment
         for the architecture will be used, however this may not be ideal
-        for disassembly. for example, the default alignment for ARM is 1, but you 
+        for disassembly. for example, the default alignment for ARM is 1, but you
         probably want it to be 4 for the purposes of disassembling ARM
         instructions.
         '''
@@ -223,7 +223,7 @@ class Disassembler(object):
             if amt_left >= size:
                 data = code.readBytes(addr, size)
             elif amt_left < 1:
-                break 
+                break
             else:
                 data = code.readBytes(addr, amt_left)
 

llvm/target.py

@@ -186,7 +186,7 @@ class TargetMachine(llvm.Wrapper):
     @property
     def feature_string(self):
         return self._ptr.getTargetFeatureString()
-    
+
     @property
     def target(self):
         return self._ptr.getTarget()

llvm/test_llvmpy.py

@@ -1469,7 +1469,7 @@ class TestArith(TestCase):
         cty = maptypes[ty]
         prototype = CFUNCTYPE(*[cty] * 3)
         callee = prototype(ptr)
-        callee(12, 23) 
+        callee(12, 23)
 
     def template(self, iop, fop):
         inttys = [Type.int(32), Type.int(64)]
@@ -1487,7 +1487,7 @@ class TestArith(TestCase):
 
     def test_sub(self):
         self.template('sub', 'fsub')
-        
+
     def test_mul(self):
         self.template('mul', 'fmul')