added llvm.mc.Operand class
Operand encapsulates information that llvm provides about an MCOperand in an instruction.
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4 changed files with 62 additions and 36 deletions
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@ -8,6 +8,45 @@ import contextlib
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from llvmpy import api
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from llvmpy.api.llvm import MCDisassembler
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class Operand(object):
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def __init__(self, mcoperand, target_machine):
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'''
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@mcoperand: an MCOperand object
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@target_machine: an llvm.target.TargetMachine object
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'''
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self.op = mcoperand
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if not self.op:
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raise llvm.LLVMException("null MCOperand argument")
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self.tm = target_machine
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def __repr__(self):
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s = "invalid"
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if self.op.isReg():
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s = "reg(%s)" % (self.reg_name())
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elif self.op.isImm():
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s = "imm(0x%02x)" % (self.op.getImm())
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elif self.op.isFPImm():
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s = "imm(%r)" % (self.op.getFPImm())
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elif self.op.isExpr():
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s = "expr(%r)" % (self.op.getExpr().getKind())
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elif self.op.isInst():
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s = repr(Instr(self.op.getInst()))
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return s
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def reg_name(self):
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if self.op.isReg():
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s = self.tm.reg_info.getName(self.op.getReg())
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if s.strip() == "":
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return "?"
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else:
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return s
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else:
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return ""
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class Instr(object):
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def __init__(self, mcinst, target_machine):
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@ -35,7 +74,7 @@ class Instr(object):
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l = []
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for i in range(0, amt):
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l.append(self.mcinst.getOperand(i))
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l.append(Operand(self.mcinst.getOperand(i), self.tm))
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return l
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@ -56,15 +95,20 @@ class Disassembler(object):
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return self.tm.asm_info
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def instr(self, mcinst):
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return Instr(mcinst, self)
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return Instr(mcinst, self.tm)
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def bad_instr(self, mcinst):
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return BadInstr(mcinst, self)
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return BadInstr(mcinst, self.tm)
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#decode some bytes into instructions. yields each instruction
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#as it is decoded.
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def decode(self, bs):
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code = api.llvm.StringRefMemoryObject.new(bs, 0)
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def decode(self, bs, addr):
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'''
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decodes some the bytes in @bs into instructions and yields
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each instructionas it is decoded. @addr is the base address
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where the instruction bytes are from (not an offset into
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@bs)
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'''
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code = api.llvm.StringRefMemoryObject.new(bs, addr)
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idx = code.getBase()
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align = self.mai.getMinInstAlignment()
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