From ba03b226c8acc9f1c3e7e524db439c20fde88b34 Mon Sep 17 00:00:00 2001 From: anthony cantor Date: Tue, 13 Aug 2013 15:14:16 -0600 Subject: [PATCH] added Target.createMCSubtargetInfo and createMCDisassembler also added bindings to classes required by the target methods. also added a convenience function to initialize all target components to the llvm module --- llvm/__init__.py | 11 +++++++++++ llvm/mc/__init__.py | 26 ++++++++++++++++++++++++++ llvmpy/src/MC/__init__.py | 14 ++++++++++++++ llvmpy/src/Support/TargetRegistry.py | 10 ++++++++++ setup.py | 1 + 5 files changed, 62 insertions(+) create mode 100644 llvm/mc/__init__.py create mode 100644 llvmpy/src/MC/__init__.py diff --git a/llvm/__init__.py b/llvm/__init__.py index 8f71446..7a98588 100644 --- a/llvm/__init__.py +++ b/llvm/__init__.py @@ -4,6 +4,8 @@ del get_versions from llvmpy import extra +from llvmpy import api + version = extra.get_llvm_version() del extra @@ -42,3 +44,12 @@ def test(verbosity=1): return len(result.failures) + len(result.errors) + +def initialize_all_target_components(): + api.llvm.InitializeAllTargets() + api.llvm.InitializeAllTargetInfos() + api.llvm.InitializeAllTargetMCs() + api.llvm.InitializeAllAsmPrinters() + api.llvm.InitializeAllDisassemblers() + api.llvm.InitializeAllAsmParsers() + diff --git a/llvm/mc/__init__.py b/llvm/mc/__init__.py new file mode 100644 index 0000000..237d5c9 --- /dev/null +++ b/llvm/mc/__init__.py @@ -0,0 +1,26 @@ +from io import BytesIO +import contextlib + +import llvm +from llvmpy import api + +class Disassembler(llvm.Wrapper): + + @staticmethod + def new(triple='', cpu='', features=''): + if not triple: + triple = api.llvm.sys.getDefaultTargetTriple() + + with contextlib.closing(BytesIO()) as error: + target = api.llvm.TargetRegistry.lookupTarget(triple, error) + if not target: + raise llvm.LLVMException(error) + if not target.hasMCDisassembler(): + raise llvm.LLVMException(target, "No disassembler provided for %s." % triple) + + sti = target.createMCSubtargetInfo(triple, cpu, features) + if not sti: + raise llvm.LLVMException("Could not create sub target info") + + return target.createMCDisassembler(sti) + diff --git a/llvmpy/src/MC/__init__.py b/llvmpy/src/MC/__init__.py new file mode 100644 index 0000000..0c7b4c9 --- /dev/null +++ b/llvmpy/src/MC/__init__.py @@ -0,0 +1,14 @@ +from binding import * +from ..namespace import llvm + +MCSubtargetInfo = llvm.Class() +MCDisassembler = llvm.Class() + +@MCSubtargetInfo +class MCSubtargetInfo: + pass + + +@MCDisassembler +class MCDisassembler: + pass diff --git a/llvmpy/src/Support/TargetRegistry.py b/llvmpy/src/Support/TargetRegistry.py index c9bef0e..55bc8b8 100644 --- a/llvmpy/src/Support/TargetRegistry.py +++ b/llvmpy/src/Support/TargetRegistry.py @@ -11,6 +11,8 @@ from src.ADT.StringRef import StringRef from src.Target.TargetMachine import TargetMachine from src.Target.TargetOptions import TargetOptions from src.Support.CodeGen import Reloc, CodeModel, CodeGenOpt +from src.MC import MCSubtargetInfo +from src.MC import MCDisassembler @Target class Target: @@ -43,6 +45,14 @@ class Target: CodeGenOpt.Level, # = CodeGenOpt.Default ).require_only(4) + createMCSubtargetInfo = Method(ptr(MCSubtargetInfo), + cast(str, StringRef), #triple + cast(str, StringRef), #cpu + cast(str, StringRef) #features + ) + + createMCDisassembler = Method(ptr(MCDisassembler), ref(MCSubtargetInfo)) + @TargetRegistry class TargetRegistry: diff --git a/setup.py b/setup.py index dd370c6..3e9482b 100644 --- a/setup.py +++ b/setup.py @@ -184,6 +184,7 @@ setup( maintainer_email = 'llvmpy@continuum.io', url = 'http://www.llvmpy.org/', packages = ['llvm', 'llvm.workaround', + 'llvm.mc', 'llvm_cbuilder', 'llpython', 'llvm_array',