diff --git a/llvm/_core.c b/llvm/_core.c index 0ca080c..1a41c41 100644 --- a/llvm/_core.c +++ b/llvm/_core.c @@ -658,8 +658,8 @@ _wLLVMCreateExecutionEngine(PyObject *self, PyObject *args) LLVMModuleProviderRef mp; PyObject *obj; int force_interpreter; - LLVMExecutionEngineRef ee; - char *outmsg; + LLVMExecutionEngineRef ee = 0; + char *outmsg = 0; PyObject *ret; int error; @@ -668,10 +668,14 @@ _wLLVMCreateExecutionEngine(PyObject *self, PyObject *args) mp = (LLVMModuleProviderRef) PyCObject_AsVoidPtr(obj); - if (force_interpreter) + printf("\ncalling LLVMCreateInterpreter.."); + +// if (force_interpreter) error = LLVMCreateInterpreter(&ee, mp, &outmsg); - else - error = LLVMCreateJITCompiler(&ee, mp, &outmsg); +// else +// error = LLVMCreateJITCompiler(&ee, mp, &outmsg); + + printf("error = %d, outmsg = %s, ee = %p\n", error, outmsg, ee); if (error) { ret = PyString_FromString(outmsg); @@ -781,6 +785,9 @@ _wLLVMGenericValueToFloat(PyObject *self, PyObject *args) _wrap_obj2none(LLVMDisposeGenericValue, LLVMGenericValueRef) +_wrap_objintlist2obj(LLVMGetIntrinsic, LLVMModuleRef, LLVMTypeRef, + LLVMValueRef) + /*===----------------------------------------------------------------------===*/ /* Python member method table */ @@ -1145,6 +1152,8 @@ static PyMethodDef core_methods[] = { _method( LLVMGenericValueToFloat ) _method( LLVMDisposeGenericValue ) + _method( LLVMGetIntrinsic ) + { NULL } }; diff --git a/llvm/core.py b/llvm/core.py index 5122517..e547232 100644 --- a/llvm/core.py +++ b/llvm/core.py @@ -96,6 +96,602 @@ ATTR_NEST = 256 ATTR_READ_NONE = 512 ATTR_READONLY = 1024 +# intrinsic IDs +INTR_ANNOTATION = 1 +INTR_ARM_THREAD_POINTER = 2 +INTR_ATOMIC_LAS = 3 +INTR_ATOMIC_LCS = 4 +INTR_ATOMIC_LOAD_AND = 5 +INTR_ATOMIC_LOAD_MAX = 6 +INTR_ATOMIC_LOAD_MIN = 7 +INTR_ATOMIC_LOAD_OR = 8 +INTR_ATOMIC_LOAD_UMAX = 9 +INTR_ATOMIC_LOAD_UMIN = 10 +INTR_ATOMIC_LOAD_XOR = 11 +INTR_ATOMIC_LSS = 12 +INTR_ATOMIC_SWAP = 13 +INTR_BSWAP = 14 +INTR_COS = 15 +INTR_CTLZ = 16 +INTR_CTPOP = 17 +INTR_CTTZ = 18 +INTR_DBG_DECLARE = 19 +INTR_DBG_FUNC_START = 20 +INTR_DBG_REGION_END = 21 +INTR_DBG_REGION_START = 22 +INTR_DBG_STOPPOINT = 23 +INTR_EH_DWARF_CFA = 24 +INTR_EH_EXCEPTION = 25 +INTR_EH_RETURN = 26 +INTR_EH_SELECTOR_I32 = 27 +INTR_EH_SELECTOR_I64 = 28 +INTR_EH_TYPEID_FOR_I32 = 29 +INTR_EH_TYPEID_FOR_I64 = 30 +INTR_EH_UNWIND_INIT = 31 +INTR_FLT_ROUNDS = 32 +INTR_FRAMEADDRESS = 33 +INTR_GCREAD = 34 +INTR_GCROOT = 35 +INTR_GCWRITE = 36 +INTR_INIT_TRAMPOLINE = 37 +INTR_LONGJMP = 38 +INTR_MEMCPY_I32 = 39 +INTR_MEMCPY_I64 = 40 +INTR_MEMMOVE_I32 = 41 +INTR_MEMMOVE_I64 = 42 +INTR_MEMORY_BARRIER = 43 +INTR_MEMSET_I32 = 44 +INTR_MEMSET_I64 = 45 +INTR_PART_SELECT = 46 +INTR_PART_SET = 47 +INTR_PCMARKER = 48 +INTR_POW = 49 +INTR_POWI = 50 +INTR_PPC_ALTIVEC_DSS = 51 +INTR_PPC_ALTIVEC_DSSALL = 52 +INTR_PPC_ALTIVEC_DST = 53 +INTR_PPC_ALTIVEC_DSTST = 54 +INTR_PPC_ALTIVEC_DSTSTT = 55 +INTR_PPC_ALTIVEC_DSTT = 56 +INTR_PPC_ALTIVEC_LVEBX = 57 +INTR_PPC_ALTIVEC_LVEHX = 58 +INTR_PPC_ALTIVEC_LVEWX = 59 +INTR_PPC_ALTIVEC_LVSL = 60 +INTR_PPC_ALTIVEC_LVSR = 61 +INTR_PPC_ALTIVEC_LVX = 62 +INTR_PPC_ALTIVEC_LVXL = 63 +INTR_PPC_ALTIVEC_MFVSCR = 64 +INTR_PPC_ALTIVEC_MTVSCR = 65 +INTR_PPC_ALTIVEC_STVEBX = 66 +INTR_PPC_ALTIVEC_STVEHX = 67 +INTR_PPC_ALTIVEC_STVEWX = 68 +INTR_PPC_ALTIVEC_STVX = 69 +INTR_PPC_ALTIVEC_STVXL = 70 +INTR_PPC_ALTIVEC_VADDCUW = 71 +INTR_PPC_ALTIVEC_VADDSBS = 72 +INTR_PPC_ALTIVEC_VADDSHS = 73 +INTR_PPC_ALTIVEC_VADDSWS = 74 +INTR_PPC_ALTIVEC_VADDUBS = 75 +INTR_PPC_ALTIVEC_VADDUHS = 76 +INTR_PPC_ALTIVEC_VADDUWS = 77 +INTR_PPC_ALTIVEC_VAVGSB = 78 +INTR_PPC_ALTIVEC_VAVGSH = 79 +INTR_PPC_ALTIVEC_VAVGSW = 80 +INTR_PPC_ALTIVEC_VAVGUB = 81 +INTR_PPC_ALTIVEC_VAVGUH = 82 +INTR_PPC_ALTIVEC_VAVGUW = 83 +INTR_PPC_ALTIVEC_VCFSX = 84 +INTR_PPC_ALTIVEC_VCFUX = 85 +INTR_PPC_ALTIVEC_VCMPBFP = 86 +INTR_PPC_ALTIVEC_VCMPBFP_P = 87 +INTR_PPC_ALTIVEC_VCMPEQFP = 88 +INTR_PPC_ALTIVEC_VCMPEQFP_P = 89 +INTR_PPC_ALTIVEC_VCMPEQUB = 90 +INTR_PPC_ALTIVEC_VCMPEQUB_P = 91 +INTR_PPC_ALTIVEC_VCMPEQUH = 92 +INTR_PPC_ALTIVEC_VCMPEQUH_P = 93 +INTR_PPC_ALTIVEC_VCMPEQUW = 94 +INTR_PPC_ALTIVEC_VCMPEQUW_P = 95 +INTR_PPC_ALTIVEC_VCMPGEFP = 96 +INTR_PPC_ALTIVEC_VCMPGEFP_P = 97 +INTR_PPC_ALTIVEC_VCMPGTFP = 98 +INTR_PPC_ALTIVEC_VCMPGTFP_P = 99 +INTR_PPC_ALTIVEC_VCMPGTSB = 100 +INTR_PPC_ALTIVEC_VCMPGTSB_P = 101 +INTR_PPC_ALTIVEC_VCMPGTSH = 102 +INTR_PPC_ALTIVEC_VCMPGTSH_P = 103 +INTR_PPC_ALTIVEC_VCMPGTSW = 104 +INTR_PPC_ALTIVEC_VCMPGTSW_P = 105 +INTR_PPC_ALTIVEC_VCMPGTUB = 106 +INTR_PPC_ALTIVEC_VCMPGTUB_P = 107 +INTR_PPC_ALTIVEC_VCMPGTUH = 108 +INTR_PPC_ALTIVEC_VCMPGTUH_P = 109 +INTR_PPC_ALTIVEC_VCMPGTUW = 110 +INTR_PPC_ALTIVEC_VCMPGTUW_P = 111 +INTR_PPC_ALTIVEC_VCTSXS = 112 +INTR_PPC_ALTIVEC_VCTUXS = 113 +INTR_PPC_ALTIVEC_VEXPTEFP = 114 +INTR_PPC_ALTIVEC_VLOGEFP = 115 +INTR_PPC_ALTIVEC_VMADDFP = 116 +INTR_PPC_ALTIVEC_VMAXFP = 117 +INTR_PPC_ALTIVEC_VMAXSB = 118 +INTR_PPC_ALTIVEC_VMAXSH = 119 +INTR_PPC_ALTIVEC_VMAXSW = 120 +INTR_PPC_ALTIVEC_VMAXUB = 121 +INTR_PPC_ALTIVEC_VMAXUH = 122 +INTR_PPC_ALTIVEC_VMAXUW = 123 +INTR_PPC_ALTIVEC_VMHADDSHS = 124 +INTR_PPC_ALTIVEC_VMHRADDSHS = 125 +INTR_PPC_ALTIVEC_VMINFP = 126 +INTR_PPC_ALTIVEC_VMINSB = 127 +INTR_PPC_ALTIVEC_VMINSH = 128 +INTR_PPC_ALTIVEC_VMINSW = 129 +INTR_PPC_ALTIVEC_VMINUB = 130 +INTR_PPC_ALTIVEC_VMINUH = 131 +INTR_PPC_ALTIVEC_VMINUW = 132 +INTR_PPC_ALTIVEC_VMLADDUHM = 133 +INTR_PPC_ALTIVEC_VMSUMMBM = 134 +INTR_PPC_ALTIVEC_VMSUMSHM = 135 +INTR_PPC_ALTIVEC_VMSUMSHS = 136 +INTR_PPC_ALTIVEC_VMSUMUBM = 137 +INTR_PPC_ALTIVEC_VMSUMUHM = 138 +INTR_PPC_ALTIVEC_VMSUMUHS = 139 +INTR_PPC_ALTIVEC_VMULESB = 140 +INTR_PPC_ALTIVEC_VMULESH = 141 +INTR_PPC_ALTIVEC_VMULEUB = 142 +INTR_PPC_ALTIVEC_VMULEUH = 143 +INTR_PPC_ALTIVEC_VMULOSB = 144 +INTR_PPC_ALTIVEC_VMULOSH = 145 +INTR_PPC_ALTIVEC_VMULOUB = 146 +INTR_PPC_ALTIVEC_VMULOUH = 147 +INTR_PPC_ALTIVEC_VNMSUBFP = 148 +INTR_PPC_ALTIVEC_VPERM = 149 +INTR_PPC_ALTIVEC_VPKPX = 150 +INTR_PPC_ALTIVEC_VPKSHSS = 151 +INTR_PPC_ALTIVEC_VPKSHUS = 152 +INTR_PPC_ALTIVEC_VPKSWSS = 153 +INTR_PPC_ALTIVEC_VPKSWUS = 154 +INTR_PPC_ALTIVEC_VPKUHUS = 155 +INTR_PPC_ALTIVEC_VPKUWUS = 156 +INTR_PPC_ALTIVEC_VREFP = 157 +INTR_PPC_ALTIVEC_VRFIM = 158 +INTR_PPC_ALTIVEC_VRFIN = 159 +INTR_PPC_ALTIVEC_VRFIP = 160 +INTR_PPC_ALTIVEC_VRFIZ = 161 +INTR_PPC_ALTIVEC_VRLB = 162 +INTR_PPC_ALTIVEC_VRLH = 163 +INTR_PPC_ALTIVEC_VRLW = 164 +INTR_PPC_ALTIVEC_VRSQRTEFP = 165 +INTR_PPC_ALTIVEC_VSEL = 166 +INTR_PPC_ALTIVEC_VSL = 167 +INTR_PPC_ALTIVEC_VSLB = 168 +INTR_PPC_ALTIVEC_VSLH = 169 +INTR_PPC_ALTIVEC_VSLO = 170 +INTR_PPC_ALTIVEC_VSLW = 171 +INTR_PPC_ALTIVEC_VSR = 172 +INTR_PPC_ALTIVEC_VSRAB = 173 +INTR_PPC_ALTIVEC_VSRAH = 174 +INTR_PPC_ALTIVEC_VSRAW = 175 +INTR_PPC_ALTIVEC_VSRB = 176 +INTR_PPC_ALTIVEC_VSRH = 177 +INTR_PPC_ALTIVEC_VSRO = 178 +INTR_PPC_ALTIVEC_VSRW = 179 +INTR_PPC_ALTIVEC_VSUBCUW = 180 +INTR_PPC_ALTIVEC_VSUBSBS = 181 +INTR_PPC_ALTIVEC_VSUBSHS = 182 +INTR_PPC_ALTIVEC_VSUBSWS = 183 +INTR_PPC_ALTIVEC_VSUBUBS = 184 +INTR_PPC_ALTIVEC_VSUBUHS = 185 +INTR_PPC_ALTIVEC_VSUBUWS = 186 +INTR_PPC_ALTIVEC_VSUM2SWS = 187 +INTR_PPC_ALTIVEC_VSUM4SBS = 188 +INTR_PPC_ALTIVEC_VSUM4SHS = 189 +INTR_PPC_ALTIVEC_VSUM4UBS = 190 +INTR_PPC_ALTIVEC_VSUMSWS = 191 +INTR_PPC_ALTIVEC_VUPKHPX = 192 +INTR_PPC_ALTIVEC_VUPKHSB = 193 +INTR_PPC_ALTIVEC_VUPKHSH = 194 +INTR_PPC_ALTIVEC_VUPKLPX = 195 +INTR_PPC_ALTIVEC_VUPKLSB = 196 +INTR_PPC_ALTIVEC_VUPKLSH = 197 +INTR_PPC_DCBA = 198 +INTR_PPC_DCBF = 199 +INTR_PPC_DCBI = 200 +INTR_PPC_DCBST = 201 +INTR_PPC_DCBT = 202 +INTR_PPC_DCBTST = 203 +INTR_PPC_DCBZ = 204 +INTR_PPC_DCBZL = 205 +INTR_PREFETCH = 206 +INTR_READCYCLECOUNTER = 207 +INTR_RETURNADDRESS = 208 +INTR_SETJMP = 209 +INTR_SIGLONGJMP = 210 +INTR_SIGSETJMP = 211 +INTR_SIN = 212 +INTR_SPU_SI_A = 213 +INTR_SPU_SI_ADDX = 214 +INTR_SPU_SI_AH = 215 +INTR_SPU_SI_AHI = 216 +INTR_SPU_SI_AI = 217 +INTR_SPU_SI_AND = 218 +INTR_SPU_SI_ANDBI = 219 +INTR_SPU_SI_ANDC = 220 +INTR_SPU_SI_ANDHI = 221 +INTR_SPU_SI_ANDI = 222 +INTR_SPU_SI_BG = 223 +INTR_SPU_SI_BGX = 224 +INTR_SPU_SI_CEQ = 225 +INTR_SPU_SI_CEQB = 226 +INTR_SPU_SI_CEQBI = 227 +INTR_SPU_SI_CEQH = 228 +INTR_SPU_SI_CEQHI = 229 +INTR_SPU_SI_CEQI = 230 +INTR_SPU_SI_CG = 231 +INTR_SPU_SI_CGT = 232 +INTR_SPU_SI_CGTB = 233 +INTR_SPU_SI_CGTBI = 234 +INTR_SPU_SI_CGTH = 235 +INTR_SPU_SI_CGTHI = 236 +INTR_SPU_SI_CGTI = 237 +INTR_SPU_SI_CGX = 238 +INTR_SPU_SI_CLGT = 239 +INTR_SPU_SI_CLGTB = 240 +INTR_SPU_SI_CLGTBI = 241 +INTR_SPU_SI_CLGTH = 242 +INTR_SPU_SI_CLGTHI = 243 +INTR_SPU_SI_CLGTI = 244 +INTR_SPU_SI_DFA = 245 +INTR_SPU_SI_DFM = 246 +INTR_SPU_SI_DFMA = 247 +INTR_SPU_SI_DFMS = 248 +INTR_SPU_SI_DFNMA = 249 +INTR_SPU_SI_DFNMS = 250 +INTR_SPU_SI_DFS = 251 +INTR_SPU_SI_FA = 252 +INTR_SPU_SI_FCEQ = 253 +INTR_SPU_SI_FCGT = 254 +INTR_SPU_SI_FCMEQ = 255 +INTR_SPU_SI_FCMGT = 256 +INTR_SPU_SI_FM = 257 +INTR_SPU_SI_FMA = 258 +INTR_SPU_SI_FMS = 259 +INTR_SPU_SI_FNMS = 260 +INTR_SPU_SI_FS = 261 +INTR_SPU_SI_FSMBI = 262 +INTR_SPU_SI_MPY = 263 +INTR_SPU_SI_MPYA = 264 +INTR_SPU_SI_MPYH = 265 +INTR_SPU_SI_MPYHH = 266 +INTR_SPU_SI_MPYHHA = 267 +INTR_SPU_SI_MPYHHAU = 268 +INTR_SPU_SI_MPYHHU = 269 +INTR_SPU_SI_MPYI = 270 +INTR_SPU_SI_MPYS = 271 +INTR_SPU_SI_MPYU = 272 +INTR_SPU_SI_MPYUI = 273 +INTR_SPU_SI_NAND = 274 +INTR_SPU_SI_NOR = 275 +INTR_SPU_SI_OR = 276 +INTR_SPU_SI_ORBI = 277 +INTR_SPU_SI_ORC = 278 +INTR_SPU_SI_ORHI = 279 +INTR_SPU_SI_ORI = 280 +INTR_SPU_SI_SF = 281 +INTR_SPU_SI_SFH = 282 +INTR_SPU_SI_SFHI = 283 +INTR_SPU_SI_SFI = 284 +INTR_SPU_SI_SFX = 285 +INTR_SPU_SI_SHLI = 286 +INTR_SPU_SI_SHLQBI = 287 +INTR_SPU_SI_SHLQBII = 288 +INTR_SPU_SI_SHLQBY = 289 +INTR_SPU_SI_SHLQBYI = 290 +INTR_SPU_SI_XOR = 291 +INTR_SPU_SI_XORBI = 292 +INTR_SPU_SI_XORHI = 293 +INTR_SPU_SI_XORI = 294 +INTR_SQRT = 295 +INTR_STACKRESTORE = 296 +INTR_STACKSAVE = 297 +INTR_TRAP = 298 +INTR_VACOPY = 299 +INTR_VAEND = 300 +INTR_VAR_ANNOTATION = 301 +INTR_VASTART = 302 +INTR_X86_MMX_EMMS = 303 +INTR_X86_MMX_FEMMS = 304 +INTR_X86_MMX_MASKMOVQ = 305 +INTR_X86_MMX_MOVNT_DQ = 306 +INTR_X86_MMX_PACKSSDW = 307 +INTR_X86_MMX_PACKSSWB = 308 +INTR_X86_MMX_PACKUSWB = 309 +INTR_X86_MMX_PADDS_B = 310 +INTR_X86_MMX_PADDS_W = 311 +INTR_X86_MMX_PADDUS_B = 312 +INTR_X86_MMX_PADDUS_W = 313 +INTR_X86_MMX_PAVG_B = 314 +INTR_X86_MMX_PAVG_W = 315 +INTR_X86_MMX_PCMPEQ_B = 316 +INTR_X86_MMX_PCMPEQ_D = 317 +INTR_X86_MMX_PCMPEQ_W = 318 +INTR_X86_MMX_PCMPGT_B = 319 +INTR_X86_MMX_PCMPGT_D = 320 +INTR_X86_MMX_PCMPGT_W = 321 +INTR_X86_MMX_PMADD_WD = 322 +INTR_X86_MMX_PMAXS_W = 323 +INTR_X86_MMX_PMAXU_B = 324 +INTR_X86_MMX_PMINS_W = 325 +INTR_X86_MMX_PMINU_B = 326 +INTR_X86_MMX_PMOVMSKB = 327 +INTR_X86_MMX_PMULH_W = 328 +INTR_X86_MMX_PMULHU_W = 329 +INTR_X86_MMX_PMULU_DQ = 330 +INTR_X86_MMX_PSAD_BW = 331 +INTR_X86_MMX_PSLL_D = 332 +INTR_X86_MMX_PSLL_Q = 333 +INTR_X86_MMX_PSLL_W = 334 +INTR_X86_MMX_PSLLI_D = 335 +INTR_X86_MMX_PSLLI_Q = 336 +INTR_X86_MMX_PSLLI_W = 337 +INTR_X86_MMX_PSRA_D = 338 +INTR_X86_MMX_PSRA_W = 339 +INTR_X86_MMX_PSRAI_D = 340 +INTR_X86_MMX_PSRAI_W = 341 +INTR_X86_MMX_PSRL_D = 342 +INTR_X86_MMX_PSRL_Q = 343 +INTR_X86_MMX_PSRL_W = 344 +INTR_X86_MMX_PSRLI_D = 345 +INTR_X86_MMX_PSRLI_Q = 346 +INTR_X86_MMX_PSRLI_W = 347 +INTR_X86_MMX_PSUBS_B = 348 +INTR_X86_MMX_PSUBS_W = 349 +INTR_X86_MMX_PSUBUS_B = 350 +INTR_X86_MMX_PSUBUS_W = 351 +INTR_X86_SSE2_ADD_SD = 352 +INTR_X86_SSE2_CLFLUSH = 353 +INTR_X86_SSE2_CMP_PD = 354 +INTR_X86_SSE2_CMP_SD = 355 +INTR_X86_SSE2_COMIEQ_SD = 356 +INTR_X86_SSE2_COMIGE_SD = 357 +INTR_X86_SSE2_COMIGT_SD = 358 +INTR_X86_SSE2_COMILE_SD = 359 +INTR_X86_SSE2_COMILT_SD = 360 +INTR_X86_SSE2_COMINEQ_SD = 361 +INTR_X86_SSE2_CVTDQ2PD = 362 +INTR_X86_SSE2_CVTDQ2PS = 363 +INTR_X86_SSE2_CVTPD2DQ = 364 +INTR_X86_SSE2_CVTPD2PS = 365 +INTR_X86_SSE2_CVTPS2DQ = 366 +INTR_X86_SSE2_CVTPS2PD = 367 +INTR_X86_SSE2_CVTSD2SI = 368 +INTR_X86_SSE2_CVTSD2SI64 = 369 +INTR_X86_SSE2_CVTSD2SS = 370 +INTR_X86_SSE2_CVTSI2SD = 371 +INTR_X86_SSE2_CVTSI642SD = 372 +INTR_X86_SSE2_CVTSS2SD = 373 +INTR_X86_SSE2_CVTTPD2DQ = 374 +INTR_X86_SSE2_CVTTPS2DQ = 375 +INTR_X86_SSE2_CVTTSD2SI = 376 +INTR_X86_SSE2_CVTTSD2SI64 = 377 +INTR_X86_SSE2_DIV_SD = 378 +INTR_X86_SSE2_LFENCE = 379 +INTR_X86_SSE2_LOADH_PD = 380 +INTR_X86_SSE2_LOADL_PD = 381 +INTR_X86_SSE2_LOADU_DQ = 382 +INTR_X86_SSE2_LOADU_PD = 383 +INTR_X86_SSE2_MASKMOV_DQU = 384 +INTR_X86_SSE2_MAX_PD = 385 +INTR_X86_SSE2_MAX_SD = 386 +INTR_X86_SSE2_MFENCE = 387 +INTR_X86_SSE2_MIN_PD = 388 +INTR_X86_SSE2_MIN_SD = 389 +INTR_X86_SSE2_MOVMSK_PD = 390 +INTR_X86_SSE2_MOVNT_DQ = 391 +INTR_X86_SSE2_MOVNT_I = 392 +INTR_X86_SSE2_MOVNT_PD = 393 +INTR_X86_SSE2_MOVS_D = 394 +INTR_X86_SSE2_MUL_SD = 395 +INTR_X86_SSE2_PACKSSDW_128 = 396 +INTR_X86_SSE2_PACKSSWB_128 = 397 +INTR_X86_SSE2_PACKUSWB_128 = 398 +INTR_X86_SSE2_PADDS_B = 399 +INTR_X86_SSE2_PADDS_W = 400 +INTR_X86_SSE2_PADDUS_B = 401 +INTR_X86_SSE2_PADDUS_W = 402 +INTR_X86_SSE2_PAVG_B = 403 +INTR_X86_SSE2_PAVG_W = 404 +INTR_X86_SSE2_PCMPEQ_B = 405 +INTR_X86_SSE2_PCMPEQ_D = 406 +INTR_X86_SSE2_PCMPEQ_W = 407 +INTR_X86_SSE2_PCMPGT_B = 408 +INTR_X86_SSE2_PCMPGT_D = 409 +INTR_X86_SSE2_PCMPGT_W = 410 +INTR_X86_SSE2_PMADD_WD = 411 +INTR_X86_SSE2_PMAXS_W = 412 +INTR_X86_SSE2_PMAXU_B = 413 +INTR_X86_SSE2_PMINS_W = 414 +INTR_X86_SSE2_PMINU_B = 415 +INTR_X86_SSE2_PMOVMSKB_128 = 416 +INTR_X86_SSE2_PMULH_W = 417 +INTR_X86_SSE2_PMULHU_W = 418 +INTR_X86_SSE2_PMULU_DQ = 419 +INTR_X86_SSE2_PSAD_BW = 420 +INTR_X86_SSE2_PSLL_D = 421 +INTR_X86_SSE2_PSLL_DQ = 422 +INTR_X86_SSE2_PSLL_Q = 423 +INTR_X86_SSE2_PSLL_W = 424 +INTR_X86_SSE2_PSLLI_D = 425 +INTR_X86_SSE2_PSLLI_Q = 426 +INTR_X86_SSE2_PSLLI_W = 427 +INTR_X86_SSE2_PSRA_D = 428 +INTR_X86_SSE2_PSRA_W = 429 +INTR_X86_SSE2_PSRAI_D = 430 +INTR_X86_SSE2_PSRAI_W = 431 +INTR_X86_SSE2_PSRL_D = 432 +INTR_X86_SSE2_PSRL_DQ = 433 +INTR_X86_SSE2_PSRL_Q = 434 +INTR_X86_SSE2_PSRL_W = 435 +INTR_X86_SSE2_PSRLI_D = 436 +INTR_X86_SSE2_PSRLI_Q = 437 +INTR_X86_SSE2_PSRLI_W = 438 +INTR_X86_SSE2_PSUBS_B = 439 +INTR_X86_SSE2_PSUBS_W = 440 +INTR_X86_SSE2_PSUBUS_B = 441 +INTR_X86_SSE2_PSUBUS_W = 442 +INTR_X86_SSE2_PUNPCKH_QDQ = 443 +INTR_X86_SSE2_PUNPCKL_QDQ = 444 +INTR_X86_SSE2_SHUF_PD = 445 +INTR_X86_SSE2_SQRT_PD = 446 +INTR_X86_SSE2_SQRT_SD = 447 +INTR_X86_SSE2_STOREL_DQ = 448 +INTR_X86_SSE2_STOREU_DQ = 449 +INTR_X86_SSE2_STOREU_PD = 450 +INTR_X86_SSE2_SUB_SD = 451 +INTR_X86_SSE2_UCOMIEQ_SD = 452 +INTR_X86_SSE2_UCOMIGE_SD = 453 +INTR_X86_SSE2_UCOMIGT_SD = 454 +INTR_X86_SSE2_UCOMILE_SD = 455 +INTR_X86_SSE2_UCOMILT_SD = 456 +INTR_X86_SSE2_UCOMINEQ_SD = 457 +INTR_X86_SSE2_UNPCKH_PD = 458 +INTR_X86_SSE2_UNPCKL_PD = 459 +INTR_X86_SSE3_ADDSUB_PD = 460 +INTR_X86_SSE3_ADDSUB_PS = 461 +INTR_X86_SSE3_HADD_PD = 462 +INTR_X86_SSE3_HADD_PS = 463 +INTR_X86_SSE3_HSUB_PD = 464 +INTR_X86_SSE3_HSUB_PS = 465 +INTR_X86_SSE3_LDU_DQ = 466 +INTR_X86_SSE3_MONITOR = 467 +INTR_X86_SSE3_MWAIT = 468 +INTR_X86_SSE41_BLENDPD = 469 +INTR_X86_SSE41_BLENDPS = 470 +INTR_X86_SSE41_BLENDVPD = 471 +INTR_X86_SSE41_BLENDVPS = 472 +INTR_X86_SSE41_DPPD = 473 +INTR_X86_SSE41_DPPS = 474 +INTR_X86_SSE41_EXTRACTPS = 475 +INTR_X86_SSE41_INSERTPS = 476 +INTR_X86_SSE41_MOVNTDQA = 477 +INTR_X86_SSE41_MPSADBW = 478 +INTR_X86_SSE41_PACKUSDW = 479 +INTR_X86_SSE41_PBLENDVB = 480 +INTR_X86_SSE41_PBLENDW = 481 +INTR_X86_SSE41_PCMPEQQ = 482 +INTR_X86_SSE41_PEXTRB = 483 +INTR_X86_SSE41_PEXTRD = 484 +INTR_X86_SSE41_PEXTRQ = 485 +INTR_X86_SSE41_PHMINPOSUW = 486 +INTR_X86_SSE41_PINSRB = 487 +INTR_X86_SSE41_PINSRD = 488 +INTR_X86_SSE41_PINSRQ = 489 +INTR_X86_SSE41_PMAXSB = 490 +INTR_X86_SSE41_PMAXSD = 491 +INTR_X86_SSE41_PMAXUD = 492 +INTR_X86_SSE41_PMAXUW = 493 +INTR_X86_SSE41_PMINSB = 494 +INTR_X86_SSE41_PMINSD = 495 +INTR_X86_SSE41_PMINUD = 496 +INTR_X86_SSE41_PMINUW = 497 +INTR_X86_SSE41_PMOVSXBD = 498 +INTR_X86_SSE41_PMOVSXBQ = 499 +INTR_X86_SSE41_PMOVSXBW = 500 +INTR_X86_SSE41_PMOVSXDQ = 501 +INTR_X86_SSE41_PMOVSXWD = 502 +INTR_X86_SSE41_PMOVSXWQ = 503 +INTR_X86_SSE41_PMOVZXBD = 504 +INTR_X86_SSE41_PMOVZXBQ = 505 +INTR_X86_SSE41_PMOVZXBW = 506 +INTR_X86_SSE41_PMOVZXDQ = 507 +INTR_X86_SSE41_PMOVZXWD = 508 +INTR_X86_SSE41_PMOVZXWQ = 509 +INTR_X86_SSE41_PMULDQ = 510 +INTR_X86_SSE41_PMULLD = 511 +INTR_X86_SSE41_ROUND_PD = 512 +INTR_X86_SSE41_ROUND_PS = 513 +INTR_X86_SSE41_ROUND_SD = 514 +INTR_X86_SSE41_ROUND_SS = 515 +INTR_X86_SSE_ADD_SS = 516 +INTR_X86_SSE_CMP_PS = 517 +INTR_X86_SSE_CMP_SS = 518 +INTR_X86_SSE_COMIEQ_SS = 519 +INTR_X86_SSE_COMIGE_SS = 520 +INTR_X86_SSE_COMIGT_SS = 521 +INTR_X86_SSE_COMILE_SS = 522 +INTR_X86_SSE_COMILT_SS = 523 +INTR_X86_SSE_COMINEQ_SS = 524 +INTR_X86_SSE_CVTPD2PI = 525 +INTR_X86_SSE_CVTPI2PD = 526 +INTR_X86_SSE_CVTPI2PS = 527 +INTR_X86_SSE_CVTPS2PI = 528 +INTR_X86_SSE_CVTSI2SS = 529 +INTR_X86_SSE_CVTSI642SS = 530 +INTR_X86_SSE_CVTSS2SI = 531 +INTR_X86_SSE_CVTSS2SI64 = 532 +INTR_X86_SSE_CVTTPD2PI = 533 +INTR_X86_SSE_CVTTPS2PI = 534 +INTR_X86_SSE_CVTTSS2SI = 535 +INTR_X86_SSE_CVTTSS2SI64 = 536 +INTR_X86_SSE_DIV_SS = 537 +INTR_X86_SSE_LDMXCSR = 538 +INTR_X86_SSE_LOADU_PS = 539 +INTR_X86_SSE_MAX_PS = 540 +INTR_X86_SSE_MAX_SS = 541 +INTR_X86_SSE_MIN_PS = 542 +INTR_X86_SSE_MIN_SS = 543 +INTR_X86_SSE_MOVMSK_PS = 544 +INTR_X86_SSE_MOVNT_PS = 545 +INTR_X86_SSE_MUL_SS = 546 +INTR_X86_SSE_RCP_PS = 547 +INTR_X86_SSE_RCP_SS = 548 +INTR_X86_SSE_RSQRT_PS = 549 +INTR_X86_SSE_RSQRT_SS = 550 +INTR_X86_SSE_SFENCE = 551 +INTR_X86_SSE_SQRT_PS = 552 +INTR_X86_SSE_SQRT_SS = 553 +INTR_X86_SSE_STMXCSR = 554 +INTR_X86_SSE_STOREU_PS = 555 +INTR_X86_SSE_SUB_SS = 556 +INTR_X86_SSE_UCOMIEQ_SS = 557 +INTR_X86_SSE_UCOMIGE_SS = 558 +INTR_X86_SSE_UCOMIGT_SS = 559 +INTR_X86_SSE_UCOMILE_SS = 560 +INTR_X86_SSE_UCOMILT_SS = 561 +INTR_X86_SSE_UCOMINEQ_SS = 562 +INTR_X86_SSSE3_PABS_B = 563 +INTR_X86_SSSE3_PABS_B_128 = 564 +INTR_X86_SSSE3_PABS_D = 565 +INTR_X86_SSSE3_PABS_D_128 = 566 +INTR_X86_SSSE3_PABS_W = 567 +INTR_X86_SSSE3_PABS_W_128 = 568 +INTR_X86_SSSE3_PALIGN_R = 569 +INTR_X86_SSSE3_PALIGN_R_128 = 570 +INTR_X86_SSSE3_PHADD_D = 571 +INTR_X86_SSSE3_PHADD_D_128 = 572 +INTR_X86_SSSE3_PHADD_SW = 573 +INTR_X86_SSSE3_PHADD_SW_128 = 574 +INTR_X86_SSSE3_PHADD_W = 575 +INTR_X86_SSSE3_PHADD_W_128 = 576 +INTR_X86_SSSE3_PHSUB_D = 577 +INTR_X86_SSSE3_PHSUB_D_128 = 578 +INTR_X86_SSSE3_PHSUB_SW = 579 +INTR_X86_SSSE3_PHSUB_SW_128 = 580 +INTR_X86_SSSE3_PHSUB_W = 581 +INTR_X86_SSSE3_PHSUB_W_128 = 582 +INTR_X86_SSSE3_PMADD_UB_SW = 583 +INTR_X86_SSSE3_PMADD_UB_SW_128 = 584 +INTR_X86_SSSE3_PMUL_HR_SW = 585 +INTR_X86_SSSE3_PMUL_HR_SW_128 = 586 +INTR_X86_SSSE3_PSHUF_B = 587 +INTR_X86_SSSE3_PSHUF_B_128 = 588 +INTR_X86_SSSE3_PSIGN_B = 589 +INTR_X86_SSSE3_PSIGN_B_128 = 590 +INTR_X86_SSSE3_PSIGN_D = 591 +INTR_X86_SSSE3_PSIGN_D_128 = 592 +INTR_X86_SSSE3_PSIGN_W = 593 +INTR_X86_SSSE3_PSIGN_W_128 = 594 + #===----------------------------------------------------------------------=== # Module @@ -937,12 +1533,20 @@ class Function(GlobalValue): @staticmethod def new(module, func_ty, name): + check_is_module(module) + check_is_type(func_ty) return Function(_core.LLVMAddFunction(module.ptr, name, func_ty.ptr), module) @staticmethod def get(module, name): return Function(_core.LLVMGetNamedFunction(module.ptr, name), module) + @staticmethod + def intrinsic(module, id, types): + check_is_module(module) + ptrs = unpack_types(types) + return Function(_core.LLVMGetIntrinsic(module.ptr, id, ptrs), module) + def __init__(self, ptr, module): GlobalValue.__init__(self, ptr, module) diff --git a/llvm/extra.cpp b/llvm/extra.cpp index 9b37f1b..7f22998 100644 --- a/llvm/extra.cpp +++ b/llvm/extra.cpp @@ -12,6 +12,7 @@ #include "llvm/ModuleProvider.h" #include "llvm/Support/MemoryBuffer.h" #include "llvm/Support/CallSite.h" +#include "llvm/IntrinsicInst.h" #include #include #include @@ -85,3 +86,16 @@ LLVMValueRef LLVMBuildGetResult(LLVMBuilderRef B, LLVMValueRef V, return wrap(unwrap(B)->CreateGetResult(unwrap(V), Index, Name)); } +LLVMValueRef LLVMGetIntrinsic(LLVMModuleRef M, int ID, + LLVMTypeRef *Types, unsigned Count) +{ + std::vector Tys; + for (LLVMTypeRef *I = Types, *E = Types + Count; I != E; ++I) + Tys.push_back(unwrap(*I)); + + Function *intfunc = Intrinsic::getDeclaration(unwrap(M), + Intrinsic::ID(ID), &Tys[0], Count); + + return wrap(intfunc); +} + diff --git a/llvm/extra.h b/llvm/extra.h index 54f9fe5..6c2fd37 100644 --- a/llvm/extra.h +++ b/llvm/extra.h @@ -46,6 +46,9 @@ LLVMValueRef LLVMBuildRetMultiple(LLVMBuilderRef, LLVMValueRef *Values, LLVMValueRef LLVMBuildGetResult(LLVMBuilderRef, LLVMValueRef V, unsigned Index, const char *Name); +LLVMValueRef LLVMGetIntrinsic(LLVMModuleRef B, int ID, + LLVMTypeRef *Types, unsigned Count); + #ifdef __cplusplus } /* extern "C" */ #endif diff --git a/llvm/wrap.h b/llvm/wrap.h index ad6be0a..6ec6b35 100644 --- a/llvm/wrap.h +++ b/llvm/wrap.h @@ -696,6 +696,35 @@ _w ## func (PyObject *self, PyObject *args) \ return ctor_ ## outtype (ret); \ } +/** + * Wrap LLVM functions of the type + * outtype func(intype1 arg1, int arg2, intype3 *arg3v, unsigned arg3n) + * where arg3v is an array of intype3 elements, arg3n in length. + */ +#define _wrap_objintlist2obj(func, intype1, intype3, outtype) \ +static PyObject * \ +_w ## func (PyObject *self, PyObject *args) \ +{ \ + PyObject *obj1, *obj3; \ + intype1 arg1; \ + int arg2; \ + intype3 *arg3v; \ + unsigned arg3n; \ + outtype ret; \ + \ + if (!PyArg_ParseTuple(args, "OiO", &obj1, &arg2, &obj3)) \ + return NULL; \ + \ + arg1 = ( intype1 ) PyCObject_AsVoidPtr(obj1); \ + arg3n = (unsigned) PyList_Size(obj3); \ + if (!(arg3v = ( intype3 *)make_array_from_list(obj3, arg3n))) \ + return PyErr_NoMemory(); \ + \ + ret = func (arg1, arg2, arg3v, arg3n); \ + free(arg3v); \ + return ctor_ ## outtype (ret); \ +} + /** * Wrap LLVM functions of the type * outtype func(intype1 arg1, intype2 arg2, intype3 *arg3v, unsigned arg3n) diff --git a/setup.py b/setup.py index 4812bda..494d413 100644 --- a/setup.py +++ b/setup.py @@ -50,7 +50,7 @@ def call_setup(llvm_config): ldflags = _run(llvm_config + ' --ldflags') libs_core, objs_core = get_libs_and_objs(llvm_config, ['core', 'analysis', 'scalaropts', 'executionengine', - 'jit', 'native']) + 'jit', 'native', 'interpreter']) std_libs = [ 'pthread', 'm' ] if not sys.platform.startswith("openbsd"): diff --git a/www/src/index.txt b/www/src/index.txt index e9d9e30..0bff2b3 100644 --- a/www/src/index.txt +++ b/www/src/index.txt @@ -13,9 +13,10 @@ away, though. Be sure to send in a patch (or shout at the author) if you miss any specific LLVM API. _Availability_: llvm-py is available (as a source package) for LLVM 2.3 -and Python 2.5. It builds on Linux, OpenBSD on i386 and x86-64/amd64. -It is expected to be usable on various unices, as well as with Python -2.4 and LLVM 2.3+svn, with minimal changes, if any. +and Python 2.5. It has been built and tested on Linux/i386, and has been +reported to work with OpenBSD. It is expected to be usable on +various unices, as well as with Python 2.4 and LLVM 2.3+svn, with +minimal changes, if any. News ---- diff --git a/www/web/index.html b/www/web/index.html index 5baee39..d801d50 100644 --- a/www/web/index.html +++ b/www/web/index.html @@ -43,9 +43,10 @@ Boost.Python, swig etc.

away, though. Be sure to send in a patch (or shout at the author) if you miss any specific LLVM API.

Availability: llvm-py is available (as a source package) for LLVM 2.3 -and Python 2.5. It builds on Linux, OpenBSD on i386 and x86-64/amd64. -It is expected to be usable on various unices, as well as with Python -2.4 and LLVM 2.3+svn, with minimal changes, if any.

+and Python 2.5. It has been built and tested on Linux/i386, and has been +reported to work with OpenBSD. It is expected to be usable on +various unices, as well as with Python 2.4 and LLVM 2.3+svn, with +minimal changes, if any.

News

@@ -80,7 +81,7 @@ It is expected to be usable on various unices, as well as with Python