2117 lines
85 KiB
Diff
2117 lines
85 KiB
Diff
Index: core.py
|
|
===================================================================
|
|
--- core.py (revision 105)
|
|
+++ core.py (working copy)
|
|
@@ -51,14 +51,15 @@
|
|
TYPE_FP128 = 4
|
|
TYPE_PPC_FP128 = 5
|
|
TYPE_LABEL = 6
|
|
-TYPE_INTEGER = 7
|
|
-TYPE_FUNCTION = 8
|
|
-TYPE_STRUCT = 9
|
|
-TYPE_ARRAY = 10
|
|
-TYPE_POINTER = 11
|
|
-TYPE_OPAQUE = 12
|
|
-TYPE_VECTOR = 13
|
|
-TYPE_METADATA = 14
|
|
+TYPE_METADATA = 7
|
|
+TYPE_X86_MMX = 8
|
|
+TYPE_INTEGER = 9
|
|
+TYPE_FUNCTION = 10
|
|
+TYPE_STRUCT = 11
|
|
+TYPE_ARRAY = 12
|
|
+TYPE_POINTER = 13
|
|
+TYPE_OPAQUE = 14
|
|
+TYPE_VECTOR = 15
|
|
|
|
# value IDs (llvm::Value::ValueTy enum)
|
|
VALUE_ARGUMENT = 0
|
|
@@ -140,11 +141,21 @@
|
|
OPCODE_INSERTVALUE = 54
|
|
|
|
# calling conventions
|
|
-CC_C = 0
|
|
-CC_FASTCALL = 8
|
|
-CC_COLDCALL = 9
|
|
-CC_X86_STDCALL = 64
|
|
-CC_X86_FASTCALL = 65
|
|
+CC_C = 0
|
|
+CC_FASTCALL = 8
|
|
+CC_COLDCALL = 9
|
|
+CC_GHC = 10
|
|
+CC_X86_STDCALL = 64
|
|
+CC_X86_FASTCALL = 65
|
|
+CC_ARM_APCS = 66
|
|
+CC_ARM_AAPCS = 67
|
|
+CC_ARM_AAPCS_VFP = 68
|
|
+CC_MSP430_INTR = 69
|
|
+CC_X86_THISCALL = 70
|
|
+CC_PTX_KERNEL = 71
|
|
+CC_PTX_DEVICE = 72
|
|
+CC_MBLAZE_INTR = 73
|
|
+CC_MBLAZE_SVOL = 74
|
|
|
|
# int predicates
|
|
ICMP_EQ = 32
|
|
@@ -248,11 +259,14 @@
|
|
ATTR_OPTIMIZE_FOR_SIZE = 1<<13
|
|
ATTR_STACK_PROTECT = 1<<14
|
|
ATTR_STACK_PROTECT_REQ = 1<<15
|
|
+ATTR_ALIGNMENT = 1<<16
|
|
ATTR_NO_CAPTURE = 1<<21
|
|
ATTR_NO_REDZONE = 1<<22
|
|
ATTR_NO_IMPLICIT_FLOAT = 1<<23
|
|
ATTR_NAKED = 1<<24
|
|
ATTR_INLINE_HINT = 1<<25
|
|
+ATTR_STACK_ALIGNMENT = 7<<26
|
|
+ATTR_HOTPATCH = 1<<29
|
|
|
|
# intrinsic IDs
|
|
from llvm._intrinsic_ids import *
|
|
Index: extra.cpp
|
|
===================================================================
|
|
--- extra.cpp (revision 105)
|
|
+++ extra.cpp (working copy)
|
|
@@ -54,7 +54,7 @@
|
|
#include "llvm/IntrinsicInst.h"
|
|
#include "llvm/Analysis/Verifier.h"
|
|
#include "llvm/Assembly/Parser.h"
|
|
-#include "llvm/System/DynamicLibrary.h"
|
|
+#include "llvm/Support/DynamicLibrary.h"
|
|
#include "llvm/PassManager.h"
|
|
#include "llvm/ExecutionEngine/ExecutionEngine.h"
|
|
#include "llvm/Analysis/LoopPass.h"
|
|
@@ -452,12 +452,19 @@
|
|
return eep->getPointerToFunction(fnp);
|
|
}
|
|
|
|
+
|
|
int LLVMInlineFunction(LLVMValueRef call)
|
|
{
|
|
llvm::Value *callp = llvm::unwrap(call);
|
|
assert(callp);
|
|
|
|
- llvm::CallSite cs = llvm::CallSite::get(callp);
|
|
+// llvm::CallSite cs = llvm::CallSite::get(callp);
|
|
+ llvm::CallSite cs;
|
|
+ llvm::Instruction *II = llvm::dyn_cast<llvm::Instruction>(callp);
|
|
+ if (II->getOpcode() == llvm::Instruction::Call)
|
|
+ cs = llvm::CallSite(static_cast<llvm::CallInst*>(II));
|
|
+ else if (II->getOpcode() == llvm::Instruction::Invoke)
|
|
+ cs = llvm::CallSite(static_cast<llvm::InvokeInst*>(II));
|
|
|
|
llvm::InlineFunctionInfo unused;
|
|
return llvm::InlineFunction(cs, unused);
|
|
@@ -501,13 +508,13 @@
|
|
define_pass( DomPrinter )
|
|
define_pass( DomViewer )
|
|
define_pass( EdgeProfiler )
|
|
-define_pass( GEPSplitter )
|
|
+//define_pass( GEPSplitter )
|
|
define_pass( GlobalsModRef )
|
|
define_pass( InstCount )
|
|
define_pass( InstructionNamer )
|
|
define_pass( LazyValueInfo )
|
|
define_pass( LCSSA )
|
|
-define_pass( LiveValues )
|
|
+//define_pass( LiveValues )
|
|
define_pass( LoopDependenceAnalysis )
|
|
define_pass( LoopExtractor )
|
|
define_pass( LoopSimplify )
|
|
@@ -519,7 +526,7 @@
|
|
define_pass( NoProfileInfo )
|
|
define_pass( OptimalEdgeProfiler )
|
|
define_pass( PartialInlining )
|
|
-define_pass( PartialSpecialization )
|
|
+//define_pass( PartialSpecialization )
|
|
define_pass( PostDomOnlyPrinter )
|
|
define_pass( PostDomOnlyViewer )
|
|
define_pass( PostDomPrinter )
|
|
@@ -528,7 +535,7 @@
|
|
define_pass( ProfileLoader )
|
|
define_pass( ProfileVerifier )
|
|
define_pass( ScalarEvolutionAliasAnalysis )
|
|
-define_pass( SimplifyHalfPowrLibCalls )
|
|
+//define_pass( SimplifyHalfPowrLibCalls )
|
|
define_pass( SingleLoopExtractor )
|
|
define_pass( StripNonDebugSymbols )
|
|
define_pass( StructRetPromotion )
|
|
Index: passes.py
|
|
===================================================================
|
|
--- passes.py (revision 105)
|
|
+++ passes.py (working copy)
|
|
@@ -68,7 +68,7 @@
|
|
PASS_EDGE_PROFILER = 25
|
|
PASS_FUNCTION_ATTRS = 26
|
|
PASS_FUNCTION_INLINING = 27
|
|
-PASS_GEP_SPLITTER = 28
|
|
+#PASS_GEP_SPLITTER = 28
|
|
PASS_GLOBAL_DCE = 29
|
|
PASS_GLOBAL_OPTIMIZER = 30
|
|
PASS_GLOBALS_MOD_REF = 31
|
|
@@ -83,11 +83,11 @@
|
|
PASS_LAZY_VALUE_INFO = 40
|
|
PASS_LCSSA = 41
|
|
PASS_LICM = 42
|
|
-PASS_LIVE_VALUES = 43
|
|
+#PASS_LIVE_VALUES = 43
|
|
PASS_LOOP_DELETION = 44
|
|
PASS_LOOP_DEPENDENCE_ANALYSIS = 45
|
|
PASS_LOOP_EXTRACTOR = 46
|
|
-PASS_LOOP_INDEX_SPLIT = 47
|
|
+#PASS_LOOP_INDEX_SPLIT = 47
|
|
PASS_LOOP_ROTATE = 48
|
|
PASS_LOOP_SIMPLIFY = 49
|
|
PASS_LOOP_STRENGTH_REDUCE = 50
|
|
@@ -102,11 +102,11 @@
|
|
PASS_NO_PROFILE_INFO = 59
|
|
PASS_OPTIMAL_EDGE_PROFILER = 60
|
|
PASS_PARTIAL_INLINING = 61
|
|
-PASS_PARTIAL_SPECIALIZATION = 62
|
|
-PASS_POST_DOM_ONLY_PRINTER = 63
|
|
-PASS_POST_DOM_ONLY_VIEWER = 64
|
|
-PASS_POST_DOM_PRINTER = 65
|
|
-PASS_POST_DOM_VIEWER = 66
|
|
+#PASS_PARTIAL_SPECIALIZATION = 62
|
|
+#PASS_POST_DOM_ONLY_PRINTER = 63
|
|
+#PASS_POST_DOM_ONLY_VIEWER = 64
|
|
+#PASS_POST_DOM_PRINTER = 65
|
|
+#PASS_POST_DOM_VIEWER = 66
|
|
PASS_PROFILE_ESTIMATOR = 67
|
|
PASS_PROFILE_LOADER = 68
|
|
PASS_PROFILE_VERIFIER = 69
|
|
@@ -116,7 +116,7 @@
|
|
PASS_SCALAR_EVOLUTION_ALIAS_ANALYSIS = 73
|
|
PASS_SCALAR_REPL_AGGREGATES = 74
|
|
PASS_SCCP = 76
|
|
-PASS_SIMPLIFY_HALF_POWR_LIB_CALLS = 77
|
|
+#PASS_SIMPLIFY_HALF_POWR_LIB_CALLS = 77
|
|
PASS_SIMPLIFY_LIB_CALLS = 78
|
|
PASS_SINGLE_LOOP_EXTRACTOR = 79
|
|
PASS_STRIP_DEAD_PROTOTYPES = 82
|
|
@@ -161,7 +161,7 @@
|
|
PASS_EDGE_PROFILER : _core.LLVMAddEdgeProfilerPass,
|
|
PASS_FUNCTION_ATTRS : _core.LLVMAddFunctionAttrsPass,
|
|
PASS_FUNCTION_INLINING : _core.LLVMAddFunctionInliningPass,
|
|
- PASS_GEP_SPLITTER : _core.LLVMAddGEPSplitterPass,
|
|
+ #PASS_GEP_SPLITTER : _core.LLVMAddGEPSplitterPass,
|
|
PASS_GLOBAL_DCE : _core.LLVMAddGlobalDCEPass,
|
|
PASS_GLOBAL_OPTIMIZER : _core.LLVMAddGlobalOptimizerPass,
|
|
PASS_GLOBALS_MOD_REF : _core.LLVMAddGlobalsModRefPass,
|
|
@@ -176,11 +176,11 @@
|
|
PASS_LAZY_VALUE_INFO : _core.LLVMAddLazyValueInfoPass,
|
|
PASS_LCSSA : _core.LLVMAddLCSSAPass,
|
|
PASS_LICM : _core.LLVMAddLICMPass,
|
|
- PASS_LIVE_VALUES : _core.LLVMAddLiveValuesPass,
|
|
+ #PASS_LIVE_VALUES : _core.LLVMAddLiveValuesPass,
|
|
PASS_LOOP_DELETION : _core.LLVMAddLoopDeletionPass,
|
|
PASS_LOOP_DEPENDENCE_ANALYSIS : _core.LLVMAddLoopDependenceAnalysisPass,
|
|
PASS_LOOP_EXTRACTOR : _core.LLVMAddLoopExtractorPass,
|
|
- PASS_LOOP_INDEX_SPLIT : _core.LLVMAddLoopIndexSplitPass,
|
|
+ #PASS_LOOP_INDEX_SPLIT : _core.LLVMAddLoopIndexSplitPass,
|
|
PASS_LOOP_ROTATE : _core.LLVMAddLoopRotatePass,
|
|
PASS_LOOP_SIMPLIFY : _core.LLVMAddLoopSimplifyPass,
|
|
PASS_LOOP_STRENGTH_REDUCE : _core.LLVMAddLoopStrengthReducePass,
|
|
@@ -195,11 +195,11 @@
|
|
PASS_NO_PROFILE_INFO : _core.LLVMAddNoProfileInfoPass,
|
|
PASS_OPTIMAL_EDGE_PROFILER : _core.LLVMAddOptimalEdgeProfilerPass,
|
|
PASS_PARTIAL_INLINING : _core.LLVMAddPartialInliningPass,
|
|
- PASS_PARTIAL_SPECIALIZATION : _core.LLVMAddPartialSpecializationPass,
|
|
- PASS_POST_DOM_ONLY_PRINTER : _core.LLVMAddPostDomOnlyPrinterPass,
|
|
- PASS_POST_DOM_ONLY_VIEWER : _core.LLVMAddPostDomOnlyViewerPass,
|
|
- PASS_POST_DOM_PRINTER : _core.LLVMAddPostDomPrinterPass,
|
|
- PASS_POST_DOM_VIEWER : _core.LLVMAddPostDomViewerPass,
|
|
+ #PASS_PARTIAL_SPECIALIZATION : _core.LLVMAddPartialSpecializationPass,
|
|
+ #PASS_POST_DOM_ONLY_PRINTER : _core.LLVMAddPostDomOnlyPrinterPass,
|
|
+ #PASS_POST_DOM_ONLY_VIEWER : _core.LLVMAddPostDomOnlyViewerPass,
|
|
+ #PASS_POST_DOM_PRINTER : _core.LLVMAddPostDomPrinterPass,
|
|
+ #PASS_POST_DOM_VIEWER : _core.LLVMAddPostDomViewerPass,
|
|
PASS_PROFILE_ESTIMATOR : _core.LLVMAddProfileEstimatorPass,
|
|
PASS_PROFILE_LOADER : _core.LLVMAddProfileLoaderPass,
|
|
PASS_PROFILE_VERIFIER : _core.LLVMAddProfileVerifierPass,
|
|
@@ -209,7 +209,7 @@
|
|
PASS_SCALAR_EVOLUTION_ALIAS_ANALYSIS : _core.LLVMAddScalarEvolutionAliasAnalysisPass,
|
|
PASS_SCALAR_REPL_AGGREGATES : _core.LLVMAddScalarReplAggregatesPass,
|
|
PASS_SCCP : _core.LLVMAddSCCPPass,
|
|
- PASS_SIMPLIFY_HALF_POWR_LIB_CALLS : _core.LLVMAddSimplifyHalfPowrLibCallsPass,
|
|
+ #PASS_SIMPLIFY_HALF_POWR_LIB_CALLS : _core.LLVMAddSimplifyHalfPowrLibCallsPass,
|
|
PASS_SIMPLIFY_LIB_CALLS : _core.LLVMAddSimplifyLibCallsPass,
|
|
PASS_SINGLE_LOOP_EXTRACTOR : _core.LLVMAddSingleLoopExtractorPass,
|
|
PASS_STRIP_DEAD_PROTOTYPES : _core.LLVMAddStripDeadPrototypesPass,
|
|
Index: _intrinsic_ids.py
|
|
===================================================================
|
|
--- _intrinsic_ids.py (revision 105)
|
|
+++ _intrinsic_ids.py (working copy)
|
|
@@ -49,854 +49,879 @@
|
|
INTR_ARM_NEON_VCNT = 14
|
|
INTR_ARM_NEON_VCVTFP2FXS = 15
|
|
INTR_ARM_NEON_VCVTFP2FXU = 16
|
|
-INTR_ARM_NEON_VCVTFXS2FP = 17
|
|
-INTR_ARM_NEON_VCVTFXU2FP = 18
|
|
-INTR_ARM_NEON_VHADDS = 19
|
|
-INTR_ARM_NEON_VHADDU = 20
|
|
-INTR_ARM_NEON_VHSUBS = 21
|
|
-INTR_ARM_NEON_VHSUBU = 22
|
|
-INTR_ARM_NEON_VLD1 = 23
|
|
-INTR_ARM_NEON_VLD2 = 24
|
|
-INTR_ARM_NEON_VLD2LANE = 25
|
|
-INTR_ARM_NEON_VLD3 = 26
|
|
-INTR_ARM_NEON_VLD3LANE = 27
|
|
-INTR_ARM_NEON_VLD4 = 28
|
|
-INTR_ARM_NEON_VLD4LANE = 29
|
|
-INTR_ARM_NEON_VMAXS = 30
|
|
-INTR_ARM_NEON_VMAXU = 31
|
|
-INTR_ARM_NEON_VMINS = 32
|
|
-INTR_ARM_NEON_VMINU = 33
|
|
-INTR_ARM_NEON_VMULLP = 34
|
|
-INTR_ARM_NEON_VMULP = 35
|
|
-INTR_ARM_NEON_VPADALS = 36
|
|
-INTR_ARM_NEON_VPADALU = 37
|
|
-INTR_ARM_NEON_VPADD = 38
|
|
-INTR_ARM_NEON_VPADDLS = 39
|
|
-INTR_ARM_NEON_VPADDLU = 40
|
|
-INTR_ARM_NEON_VPMAXS = 41
|
|
-INTR_ARM_NEON_VPMAXU = 42
|
|
-INTR_ARM_NEON_VPMINS = 43
|
|
-INTR_ARM_NEON_VPMINU = 44
|
|
-INTR_ARM_NEON_VQABS = 45
|
|
-INTR_ARM_NEON_VQADDS = 46
|
|
-INTR_ARM_NEON_VQADDU = 47
|
|
-INTR_ARM_NEON_VQDMLAL = 48
|
|
-INTR_ARM_NEON_VQDMLSL = 49
|
|
-INTR_ARM_NEON_VQDMULH = 50
|
|
-INTR_ARM_NEON_VQDMULL = 51
|
|
-INTR_ARM_NEON_VQMOVNS = 52
|
|
-INTR_ARM_NEON_VQMOVNSU = 53
|
|
-INTR_ARM_NEON_VQMOVNU = 54
|
|
-INTR_ARM_NEON_VQNEG = 55
|
|
-INTR_ARM_NEON_VQRDMULH = 56
|
|
-INTR_ARM_NEON_VQRSHIFTNS = 57
|
|
-INTR_ARM_NEON_VQRSHIFTNSU = 58
|
|
-INTR_ARM_NEON_VQRSHIFTNU = 59
|
|
-INTR_ARM_NEON_VQRSHIFTS = 60
|
|
-INTR_ARM_NEON_VQRSHIFTU = 61
|
|
-INTR_ARM_NEON_VQSHIFTNS = 62
|
|
-INTR_ARM_NEON_VQSHIFTNSU = 63
|
|
-INTR_ARM_NEON_VQSHIFTNU = 64
|
|
-INTR_ARM_NEON_VQSHIFTS = 65
|
|
-INTR_ARM_NEON_VQSHIFTSU = 66
|
|
-INTR_ARM_NEON_VQSHIFTU = 67
|
|
-INTR_ARM_NEON_VQSUBS = 68
|
|
-INTR_ARM_NEON_VQSUBU = 69
|
|
-INTR_ARM_NEON_VRADDHN = 70
|
|
-INTR_ARM_NEON_VRECPE = 71
|
|
-INTR_ARM_NEON_VRECPS = 72
|
|
-INTR_ARM_NEON_VRHADDS = 73
|
|
-INTR_ARM_NEON_VRHADDU = 74
|
|
-INTR_ARM_NEON_VRSHIFTN = 75
|
|
-INTR_ARM_NEON_VRSHIFTS = 76
|
|
-INTR_ARM_NEON_VRSHIFTU = 77
|
|
-INTR_ARM_NEON_VRSQRTE = 78
|
|
-INTR_ARM_NEON_VRSQRTS = 79
|
|
-INTR_ARM_NEON_VRSUBHN = 80
|
|
-INTR_ARM_NEON_VSHIFTINS = 81
|
|
-INTR_ARM_NEON_VSHIFTLS = 82
|
|
-INTR_ARM_NEON_VSHIFTLU = 83
|
|
-INTR_ARM_NEON_VSHIFTN = 84
|
|
-INTR_ARM_NEON_VSHIFTS = 85
|
|
-INTR_ARM_NEON_VSHIFTU = 86
|
|
-INTR_ARM_NEON_VST1 = 87
|
|
-INTR_ARM_NEON_VST2 = 88
|
|
-INTR_ARM_NEON_VST2LANE = 89
|
|
-INTR_ARM_NEON_VST3 = 90
|
|
-INTR_ARM_NEON_VST3LANE = 91
|
|
-INTR_ARM_NEON_VST4 = 92
|
|
-INTR_ARM_NEON_VST4LANE = 93
|
|
-INTR_ARM_NEON_VSUBHN = 94
|
|
-INTR_ARM_NEON_VTBL1 = 95
|
|
-INTR_ARM_NEON_VTBL2 = 96
|
|
-INTR_ARM_NEON_VTBL3 = 97
|
|
-INTR_ARM_NEON_VTBL4 = 98
|
|
-INTR_ARM_NEON_VTBX1 = 99
|
|
-INTR_ARM_NEON_VTBX2 = 100
|
|
-INTR_ARM_NEON_VTBX3 = 101
|
|
-INTR_ARM_NEON_VTBX4 = 102
|
|
-INTR_ARM_QADD = 103
|
|
-INTR_ARM_QSUB = 104
|
|
-INTR_ARM_SET_FPSCR = 105
|
|
-INTR_ARM_SSAT = 106
|
|
-INTR_ARM_THREAD_POINTER = 107
|
|
-INTR_ARM_USAT = 108
|
|
-INTR_ARM_VCVTR = 109
|
|
-INTR_ARM_VCVTRU = 110
|
|
-INTR_ATOMIC_CMP_SWAP = 111
|
|
-INTR_ATOMIC_LOAD_ADD = 112
|
|
-INTR_ATOMIC_LOAD_AND = 113
|
|
-INTR_ATOMIC_LOAD_MAX = 114
|
|
-INTR_ATOMIC_LOAD_MIN = 115
|
|
-INTR_ATOMIC_LOAD_NAND = 116
|
|
-INTR_ATOMIC_LOAD_OR = 117
|
|
-INTR_ATOMIC_LOAD_SUB = 118
|
|
-INTR_ATOMIC_LOAD_UMAX = 119
|
|
-INTR_ATOMIC_LOAD_UMIN = 120
|
|
-INTR_ATOMIC_LOAD_XOR = 121
|
|
-INTR_ATOMIC_SWAP = 122
|
|
-INTR_BSWAP = 123
|
|
-INTR_CONVERT_FROM_FP16 = 124
|
|
-INTR_CONVERT_TO_FP16 = 125
|
|
-INTR_CONVERTFF = 126
|
|
-INTR_CONVERTFSI = 127
|
|
-INTR_CONVERTFUI = 128
|
|
-INTR_CONVERTSIF = 129
|
|
-INTR_CONVERTSS = 130
|
|
-INTR_CONVERTSU = 131
|
|
-INTR_CONVERTUIF = 132
|
|
-INTR_CONVERTUS = 133
|
|
-INTR_CONVERTUU = 134
|
|
-INTR_COS = 135
|
|
-INTR_CTLZ = 136
|
|
-INTR_CTPOP = 137
|
|
-INTR_CTTZ = 138
|
|
-INTR_DBG_DECLARE = 139
|
|
-INTR_DBG_VALUE = 140
|
|
-INTR_EH_DWARF_CFA = 141
|
|
-INTR_EH_EXCEPTION = 142
|
|
-INTR_EH_RETURN_I32 = 143
|
|
-INTR_EH_RETURN_I64 = 144
|
|
-INTR_EH_SELECTOR = 145
|
|
-INTR_EH_SJLJ_CALLSITE = 146
|
|
-INTR_EH_SJLJ_LONGJMP = 147
|
|
-INTR_EH_SJLJ_LSDA = 148
|
|
-INTR_EH_SJLJ_SETJMP = 149
|
|
-INTR_EH_TYPEID_FOR = 150
|
|
-INTR_EH_UNWIND_INIT = 151
|
|
-INTR_EXP = 152
|
|
-INTR_EXP2 = 153
|
|
-INTR_FLT_ROUNDS = 154
|
|
-INTR_FRAMEADDRESS = 155
|
|
-INTR_GCREAD = 156
|
|
-INTR_GCROOT = 157
|
|
-INTR_GCWRITE = 158
|
|
-INTR_INIT_TRAMPOLINE = 159
|
|
-INTR_INVARIANT_END = 160
|
|
-INTR_INVARIANT_START = 161
|
|
-INTR_LIFETIME_END = 162
|
|
-INTR_LIFETIME_START = 163
|
|
-INTR_LOG = 164
|
|
-INTR_LOG10 = 165
|
|
-INTR_LOG2 = 166
|
|
-INTR_LONGJMP = 167
|
|
-INTR_MEMCPY = 168
|
|
-INTR_MEMMOVE = 169
|
|
-INTR_MEMORY_BARRIER = 170
|
|
-INTR_MEMSET = 171
|
|
-INTR_OBJECTSIZE = 172
|
|
-INTR_PCMARKER = 173
|
|
-INTR_POW = 174
|
|
-INTR_POWI = 175
|
|
-INTR_PPC_ALTIVEC_DSS = 176
|
|
-INTR_PPC_ALTIVEC_DSSALL = 177
|
|
-INTR_PPC_ALTIVEC_DST = 178
|
|
-INTR_PPC_ALTIVEC_DSTST = 179
|
|
-INTR_PPC_ALTIVEC_DSTSTT = 180
|
|
-INTR_PPC_ALTIVEC_DSTT = 181
|
|
-INTR_PPC_ALTIVEC_LVEBX = 182
|
|
-INTR_PPC_ALTIVEC_LVEHX = 183
|
|
-INTR_PPC_ALTIVEC_LVEWX = 184
|
|
-INTR_PPC_ALTIVEC_LVSL = 185
|
|
-INTR_PPC_ALTIVEC_LVSR = 186
|
|
-INTR_PPC_ALTIVEC_LVX = 187
|
|
-INTR_PPC_ALTIVEC_LVXL = 188
|
|
-INTR_PPC_ALTIVEC_MFVSCR = 189
|
|
-INTR_PPC_ALTIVEC_MTVSCR = 190
|
|
-INTR_PPC_ALTIVEC_STVEBX = 191
|
|
-INTR_PPC_ALTIVEC_STVEHX = 192
|
|
-INTR_PPC_ALTIVEC_STVEWX = 193
|
|
-INTR_PPC_ALTIVEC_STVX = 194
|
|
-INTR_PPC_ALTIVEC_STVXL = 195
|
|
-INTR_PPC_ALTIVEC_VADDCUW = 196
|
|
-INTR_PPC_ALTIVEC_VADDSBS = 197
|
|
-INTR_PPC_ALTIVEC_VADDSHS = 198
|
|
-INTR_PPC_ALTIVEC_VADDSWS = 199
|
|
-INTR_PPC_ALTIVEC_VADDUBS = 200
|
|
-INTR_PPC_ALTIVEC_VADDUHS = 201
|
|
-INTR_PPC_ALTIVEC_VADDUWS = 202
|
|
-INTR_PPC_ALTIVEC_VAVGSB = 203
|
|
-INTR_PPC_ALTIVEC_VAVGSH = 204
|
|
-INTR_PPC_ALTIVEC_VAVGSW = 205
|
|
-INTR_PPC_ALTIVEC_VAVGUB = 206
|
|
-INTR_PPC_ALTIVEC_VAVGUH = 207
|
|
-INTR_PPC_ALTIVEC_VAVGUW = 208
|
|
-INTR_PPC_ALTIVEC_VCFSX = 209
|
|
-INTR_PPC_ALTIVEC_VCFUX = 210
|
|
-INTR_PPC_ALTIVEC_VCMPBFP = 211
|
|
-INTR_PPC_ALTIVEC_VCMPBFP_P = 212
|
|
-INTR_PPC_ALTIVEC_VCMPEQFP = 213
|
|
-INTR_PPC_ALTIVEC_VCMPEQFP_P = 214
|
|
-INTR_PPC_ALTIVEC_VCMPEQUB = 215
|
|
-INTR_PPC_ALTIVEC_VCMPEQUB_P = 216
|
|
-INTR_PPC_ALTIVEC_VCMPEQUH = 217
|
|
-INTR_PPC_ALTIVEC_VCMPEQUH_P = 218
|
|
-INTR_PPC_ALTIVEC_VCMPEQUW = 219
|
|
-INTR_PPC_ALTIVEC_VCMPEQUW_P = 220
|
|
-INTR_PPC_ALTIVEC_VCMPGEFP = 221
|
|
-INTR_PPC_ALTIVEC_VCMPGEFP_P = 222
|
|
-INTR_PPC_ALTIVEC_VCMPGTFP = 223
|
|
-INTR_PPC_ALTIVEC_VCMPGTFP_P = 224
|
|
-INTR_PPC_ALTIVEC_VCMPGTSB = 225
|
|
-INTR_PPC_ALTIVEC_VCMPGTSB_P = 226
|
|
-INTR_PPC_ALTIVEC_VCMPGTSH = 227
|
|
-INTR_PPC_ALTIVEC_VCMPGTSH_P = 228
|
|
-INTR_PPC_ALTIVEC_VCMPGTSW = 229
|
|
-INTR_PPC_ALTIVEC_VCMPGTSW_P = 230
|
|
-INTR_PPC_ALTIVEC_VCMPGTUB = 231
|
|
-INTR_PPC_ALTIVEC_VCMPGTUB_P = 232
|
|
-INTR_PPC_ALTIVEC_VCMPGTUH = 233
|
|
-INTR_PPC_ALTIVEC_VCMPGTUH_P = 234
|
|
-INTR_PPC_ALTIVEC_VCMPGTUW = 235
|
|
-INTR_PPC_ALTIVEC_VCMPGTUW_P = 236
|
|
-INTR_PPC_ALTIVEC_VCTSXS = 237
|
|
-INTR_PPC_ALTIVEC_VCTUXS = 238
|
|
-INTR_PPC_ALTIVEC_VEXPTEFP = 239
|
|
-INTR_PPC_ALTIVEC_VLOGEFP = 240
|
|
-INTR_PPC_ALTIVEC_VMADDFP = 241
|
|
-INTR_PPC_ALTIVEC_VMAXFP = 242
|
|
-INTR_PPC_ALTIVEC_VMAXSB = 243
|
|
-INTR_PPC_ALTIVEC_VMAXSH = 244
|
|
-INTR_PPC_ALTIVEC_VMAXSW = 245
|
|
-INTR_PPC_ALTIVEC_VMAXUB = 246
|
|
-INTR_PPC_ALTIVEC_VMAXUH = 247
|
|
-INTR_PPC_ALTIVEC_VMAXUW = 248
|
|
-INTR_PPC_ALTIVEC_VMHADDSHS = 249
|
|
-INTR_PPC_ALTIVEC_VMHRADDSHS = 250
|
|
-INTR_PPC_ALTIVEC_VMINFP = 251
|
|
-INTR_PPC_ALTIVEC_VMINSB = 252
|
|
-INTR_PPC_ALTIVEC_VMINSH = 253
|
|
-INTR_PPC_ALTIVEC_VMINSW = 254
|
|
-INTR_PPC_ALTIVEC_VMINUB = 255
|
|
-INTR_PPC_ALTIVEC_VMINUH = 256
|
|
-INTR_PPC_ALTIVEC_VMINUW = 257
|
|
-INTR_PPC_ALTIVEC_VMLADDUHM = 258
|
|
-INTR_PPC_ALTIVEC_VMSUMMBM = 259
|
|
-INTR_PPC_ALTIVEC_VMSUMSHM = 260
|
|
-INTR_PPC_ALTIVEC_VMSUMSHS = 261
|
|
-INTR_PPC_ALTIVEC_VMSUMUBM = 262
|
|
-INTR_PPC_ALTIVEC_VMSUMUHM = 263
|
|
-INTR_PPC_ALTIVEC_VMSUMUHS = 264
|
|
-INTR_PPC_ALTIVEC_VMULESB = 265
|
|
-INTR_PPC_ALTIVEC_VMULESH = 266
|
|
-INTR_PPC_ALTIVEC_VMULEUB = 267
|
|
-INTR_PPC_ALTIVEC_VMULEUH = 268
|
|
-INTR_PPC_ALTIVEC_VMULOSB = 269
|
|
-INTR_PPC_ALTIVEC_VMULOSH = 270
|
|
-INTR_PPC_ALTIVEC_VMULOUB = 271
|
|
-INTR_PPC_ALTIVEC_VMULOUH = 272
|
|
-INTR_PPC_ALTIVEC_VNMSUBFP = 273
|
|
-INTR_PPC_ALTIVEC_VPERM = 274
|
|
-INTR_PPC_ALTIVEC_VPKPX = 275
|
|
-INTR_PPC_ALTIVEC_VPKSHSS = 276
|
|
-INTR_PPC_ALTIVEC_VPKSHUS = 277
|
|
-INTR_PPC_ALTIVEC_VPKSWSS = 278
|
|
-INTR_PPC_ALTIVEC_VPKSWUS = 279
|
|
-INTR_PPC_ALTIVEC_VPKUHUS = 280
|
|
-INTR_PPC_ALTIVEC_VPKUWUS = 281
|
|
-INTR_PPC_ALTIVEC_VREFP = 282
|
|
-INTR_PPC_ALTIVEC_VRFIM = 283
|
|
-INTR_PPC_ALTIVEC_VRFIN = 284
|
|
-INTR_PPC_ALTIVEC_VRFIP = 285
|
|
-INTR_PPC_ALTIVEC_VRFIZ = 286
|
|
-INTR_PPC_ALTIVEC_VRLB = 287
|
|
-INTR_PPC_ALTIVEC_VRLH = 288
|
|
-INTR_PPC_ALTIVEC_VRLW = 289
|
|
-INTR_PPC_ALTIVEC_VRSQRTEFP = 290
|
|
-INTR_PPC_ALTIVEC_VSEL = 291
|
|
-INTR_PPC_ALTIVEC_VSL = 292
|
|
-INTR_PPC_ALTIVEC_VSLB = 293
|
|
-INTR_PPC_ALTIVEC_VSLH = 294
|
|
-INTR_PPC_ALTIVEC_VSLO = 295
|
|
-INTR_PPC_ALTIVEC_VSLW = 296
|
|
-INTR_PPC_ALTIVEC_VSR = 297
|
|
-INTR_PPC_ALTIVEC_VSRAB = 298
|
|
-INTR_PPC_ALTIVEC_VSRAH = 299
|
|
-INTR_PPC_ALTIVEC_VSRAW = 300
|
|
-INTR_PPC_ALTIVEC_VSRB = 301
|
|
-INTR_PPC_ALTIVEC_VSRH = 302
|
|
-INTR_PPC_ALTIVEC_VSRO = 303
|
|
-INTR_PPC_ALTIVEC_VSRW = 304
|
|
-INTR_PPC_ALTIVEC_VSUBCUW = 305
|
|
-INTR_PPC_ALTIVEC_VSUBSBS = 306
|
|
-INTR_PPC_ALTIVEC_VSUBSHS = 307
|
|
-INTR_PPC_ALTIVEC_VSUBSWS = 308
|
|
-INTR_PPC_ALTIVEC_VSUBUBS = 309
|
|
-INTR_PPC_ALTIVEC_VSUBUHS = 310
|
|
-INTR_PPC_ALTIVEC_VSUBUWS = 311
|
|
-INTR_PPC_ALTIVEC_VSUM2SWS = 312
|
|
-INTR_PPC_ALTIVEC_VSUM4SBS = 313
|
|
-INTR_PPC_ALTIVEC_VSUM4SHS = 314
|
|
-INTR_PPC_ALTIVEC_VSUM4UBS = 315
|
|
-INTR_PPC_ALTIVEC_VSUMSWS = 316
|
|
-INTR_PPC_ALTIVEC_VUPKHPX = 317
|
|
-INTR_PPC_ALTIVEC_VUPKHSB = 318
|
|
-INTR_PPC_ALTIVEC_VUPKHSH = 319
|
|
-INTR_PPC_ALTIVEC_VUPKLPX = 320
|
|
-INTR_PPC_ALTIVEC_VUPKLSB = 321
|
|
-INTR_PPC_ALTIVEC_VUPKLSH = 322
|
|
-INTR_PPC_DCBA = 323
|
|
-INTR_PPC_DCBF = 324
|
|
-INTR_PPC_DCBI = 325
|
|
-INTR_PPC_DCBST = 326
|
|
-INTR_PPC_DCBT = 327
|
|
-INTR_PPC_DCBTST = 328
|
|
-INTR_PPC_DCBZ = 329
|
|
-INTR_PPC_DCBZL = 330
|
|
-INTR_PPC_SYNC = 331
|
|
-INTR_PREFETCH = 332
|
|
-INTR_PTR_ANNOTATION = 333
|
|
-INTR_READCYCLECOUNTER = 334
|
|
-INTR_RETURNADDRESS = 335
|
|
-INTR_SADD_WITH_OVERFLOW = 336
|
|
-INTR_SETJMP = 337
|
|
-INTR_SIGLONGJMP = 338
|
|
-INTR_SIGSETJMP = 339
|
|
-INTR_SIN = 340
|
|
-INTR_SMUL_WITH_OVERFLOW = 341
|
|
-INTR_SPU_SI_A = 342
|
|
-INTR_SPU_SI_ADDX = 343
|
|
-INTR_SPU_SI_AH = 344
|
|
-INTR_SPU_SI_AHI = 345
|
|
-INTR_SPU_SI_AI = 346
|
|
-INTR_SPU_SI_AND = 347
|
|
-INTR_SPU_SI_ANDBI = 348
|
|
-INTR_SPU_SI_ANDC = 349
|
|
-INTR_SPU_SI_ANDHI = 350
|
|
-INTR_SPU_SI_ANDI = 351
|
|
-INTR_SPU_SI_BG = 352
|
|
-INTR_SPU_SI_BGX = 353
|
|
-INTR_SPU_SI_CEQ = 354
|
|
-INTR_SPU_SI_CEQB = 355
|
|
-INTR_SPU_SI_CEQBI = 356
|
|
-INTR_SPU_SI_CEQH = 357
|
|
-INTR_SPU_SI_CEQHI = 358
|
|
-INTR_SPU_SI_CEQI = 359
|
|
-INTR_SPU_SI_CG = 360
|
|
-INTR_SPU_SI_CGT = 361
|
|
-INTR_SPU_SI_CGTB = 362
|
|
-INTR_SPU_SI_CGTBI = 363
|
|
-INTR_SPU_SI_CGTH = 364
|
|
-INTR_SPU_SI_CGTHI = 365
|
|
-INTR_SPU_SI_CGTI = 366
|
|
-INTR_SPU_SI_CGX = 367
|
|
-INTR_SPU_SI_CLGT = 368
|
|
-INTR_SPU_SI_CLGTB = 369
|
|
-INTR_SPU_SI_CLGTBI = 370
|
|
-INTR_SPU_SI_CLGTH = 371
|
|
-INTR_SPU_SI_CLGTHI = 372
|
|
-INTR_SPU_SI_CLGTI = 373
|
|
-INTR_SPU_SI_DFA = 374
|
|
-INTR_SPU_SI_DFM = 375
|
|
-INTR_SPU_SI_DFMA = 376
|
|
-INTR_SPU_SI_DFMS = 377
|
|
-INTR_SPU_SI_DFNMA = 378
|
|
-INTR_SPU_SI_DFNMS = 379
|
|
-INTR_SPU_SI_DFS = 380
|
|
-INTR_SPU_SI_FA = 381
|
|
-INTR_SPU_SI_FCEQ = 382
|
|
-INTR_SPU_SI_FCGT = 383
|
|
-INTR_SPU_SI_FCMEQ = 384
|
|
-INTR_SPU_SI_FCMGT = 385
|
|
-INTR_SPU_SI_FM = 386
|
|
-INTR_SPU_SI_FMA = 387
|
|
-INTR_SPU_SI_FMS = 388
|
|
-INTR_SPU_SI_FNMS = 389
|
|
-INTR_SPU_SI_FS = 390
|
|
-INTR_SPU_SI_FSMBI = 391
|
|
-INTR_SPU_SI_MPY = 392
|
|
-INTR_SPU_SI_MPYA = 393
|
|
-INTR_SPU_SI_MPYH = 394
|
|
-INTR_SPU_SI_MPYHH = 395
|
|
-INTR_SPU_SI_MPYHHA = 396
|
|
-INTR_SPU_SI_MPYHHAU = 397
|
|
-INTR_SPU_SI_MPYHHU = 398
|
|
-INTR_SPU_SI_MPYI = 399
|
|
-INTR_SPU_SI_MPYS = 400
|
|
-INTR_SPU_SI_MPYU = 401
|
|
-INTR_SPU_SI_MPYUI = 402
|
|
-INTR_SPU_SI_NAND = 403
|
|
-INTR_SPU_SI_NOR = 404
|
|
-INTR_SPU_SI_OR = 405
|
|
-INTR_SPU_SI_ORBI = 406
|
|
-INTR_SPU_SI_ORC = 407
|
|
-INTR_SPU_SI_ORHI = 408
|
|
-INTR_SPU_SI_ORI = 409
|
|
-INTR_SPU_SI_SF = 410
|
|
-INTR_SPU_SI_SFH = 411
|
|
-INTR_SPU_SI_SFHI = 412
|
|
-INTR_SPU_SI_SFI = 413
|
|
-INTR_SPU_SI_SFX = 414
|
|
-INTR_SPU_SI_SHLI = 415
|
|
-INTR_SPU_SI_SHLQBI = 416
|
|
-INTR_SPU_SI_SHLQBII = 417
|
|
-INTR_SPU_SI_SHLQBY = 418
|
|
-INTR_SPU_SI_SHLQBYI = 419
|
|
-INTR_SPU_SI_XOR = 420
|
|
-INTR_SPU_SI_XORBI = 421
|
|
-INTR_SPU_SI_XORHI = 422
|
|
-INTR_SPU_SI_XORI = 423
|
|
-INTR_SQRT = 424
|
|
-INTR_SSUB_WITH_OVERFLOW = 425
|
|
-INTR_STACKPROTECTOR = 426
|
|
-INTR_STACKRESTORE = 427
|
|
-INTR_STACKSAVE = 428
|
|
-INTR_TRAP = 429
|
|
-INTR_UADD_WITH_OVERFLOW = 430
|
|
-INTR_UMUL_WITH_OVERFLOW = 431
|
|
-INTR_USUB_WITH_OVERFLOW = 432
|
|
-INTR_VACOPY = 433
|
|
-INTR_VAEND = 434
|
|
-INTR_VAR_ANNOTATION = 435
|
|
-INTR_VASTART = 436
|
|
-INTR_X86_AESNI_AESDEC = 437
|
|
-INTR_X86_AESNI_AESDECLAST = 438
|
|
-INTR_X86_AESNI_AESENC = 439
|
|
-INTR_X86_AESNI_AESENCLAST = 440
|
|
-INTR_X86_AESNI_AESIMC = 441
|
|
-INTR_X86_AESNI_AESKEYGENASSIST = 442
|
|
-INTR_X86_AVX_ADDSUB_PD_256 = 443
|
|
-INTR_X86_AVX_ADDSUB_PS_256 = 444
|
|
-INTR_X86_AVX_BLEND_PD_256 = 445
|
|
-INTR_X86_AVX_BLEND_PS_256 = 446
|
|
-INTR_X86_AVX_BLENDV_PD_256 = 447
|
|
-INTR_X86_AVX_BLENDV_PS_256 = 448
|
|
-INTR_X86_AVX_CMP_PD_256 = 449
|
|
-INTR_X86_AVX_CMP_PS_256 = 450
|
|
-INTR_X86_AVX_CVT_PD2_PS_256 = 451
|
|
-INTR_X86_AVX_CVT_PD2DQ_256 = 452
|
|
-INTR_X86_AVX_CVT_PS2_PD_256 = 453
|
|
-INTR_X86_AVX_CVT_PS2DQ_256 = 454
|
|
-INTR_X86_AVX_CVTDQ2_PD_256 = 455
|
|
-INTR_X86_AVX_CVTDQ2_PS_256 = 456
|
|
-INTR_X86_AVX_CVTT_PD2DQ_256 = 457
|
|
-INTR_X86_AVX_CVTT_PS2DQ_256 = 458
|
|
-INTR_X86_AVX_DP_PS_256 = 459
|
|
-INTR_X86_AVX_HADD_PD_256 = 460
|
|
-INTR_X86_AVX_HADD_PS_256 = 461
|
|
-INTR_X86_AVX_HSUB_PD_256 = 462
|
|
-INTR_X86_AVX_HSUB_PS_256 = 463
|
|
-INTR_X86_AVX_LDU_DQ_256 = 464
|
|
-INTR_X86_AVX_LOADU_DQ_256 = 465
|
|
-INTR_X86_AVX_LOADU_PD_256 = 466
|
|
-INTR_X86_AVX_LOADU_PS_256 = 467
|
|
-INTR_X86_AVX_MASKLOAD_PD = 468
|
|
-INTR_X86_AVX_MASKLOAD_PD_256 = 469
|
|
-INTR_X86_AVX_MASKLOAD_PS = 470
|
|
-INTR_X86_AVX_MASKLOAD_PS_256 = 471
|
|
-INTR_X86_AVX_MASKSTORE_PD = 472
|
|
-INTR_X86_AVX_MASKSTORE_PD_256 = 473
|
|
-INTR_X86_AVX_MASKSTORE_PS = 474
|
|
-INTR_X86_AVX_MASKSTORE_PS_256 = 475
|
|
-INTR_X86_AVX_MAX_PD_256 = 476
|
|
-INTR_X86_AVX_MAX_PS_256 = 477
|
|
-INTR_X86_AVX_MIN_PD_256 = 478
|
|
-INTR_X86_AVX_MIN_PS_256 = 479
|
|
-INTR_X86_AVX_MOVMSK_PD_256 = 480
|
|
-INTR_X86_AVX_MOVMSK_PS_256 = 481
|
|
-INTR_X86_AVX_MOVNT_DQ_256 = 482
|
|
-INTR_X86_AVX_MOVNT_PD_256 = 483
|
|
-INTR_X86_AVX_MOVNT_PS_256 = 484
|
|
-INTR_X86_AVX_PTESTC_256 = 485
|
|
-INTR_X86_AVX_PTESTNZC_256 = 486
|
|
-INTR_X86_AVX_PTESTZ_256 = 487
|
|
-INTR_X86_AVX_RCP_PS_256 = 488
|
|
-INTR_X86_AVX_ROUND_PD_256 = 489
|
|
-INTR_X86_AVX_ROUND_PS_256 = 490
|
|
-INTR_X86_AVX_RSQRT_PS_256 = 491
|
|
-INTR_X86_AVX_SQRT_PD_256 = 492
|
|
-INTR_X86_AVX_SQRT_PS_256 = 493
|
|
-INTR_X86_AVX_STOREU_DQ_256 = 494
|
|
-INTR_X86_AVX_STOREU_PD_256 = 495
|
|
-INTR_X86_AVX_STOREU_PS_256 = 496
|
|
-INTR_X86_AVX_VBROADCAST_SD_256 = 497
|
|
-INTR_X86_AVX_VBROADCASTF128_PD_256 = 498
|
|
-INTR_X86_AVX_VBROADCASTF128_PS_256 = 499
|
|
-INTR_X86_AVX_VBROADCASTSS = 500
|
|
-INTR_X86_AVX_VBROADCASTSS_256 = 501
|
|
-INTR_X86_AVX_VEXTRACTF128_PD_256 = 502
|
|
-INTR_X86_AVX_VEXTRACTF128_PS_256 = 503
|
|
-INTR_X86_AVX_VEXTRACTF128_SI_256 = 504
|
|
-INTR_X86_AVX_VINSERTF128_PD_256 = 505
|
|
-INTR_X86_AVX_VINSERTF128_PS_256 = 506
|
|
-INTR_X86_AVX_VINSERTF128_SI_256 = 507
|
|
-INTR_X86_AVX_VPERM2F128_PD_256 = 508
|
|
-INTR_X86_AVX_VPERM2F128_PS_256 = 509
|
|
-INTR_X86_AVX_VPERM2F128_SI_256 = 510
|
|
-INTR_X86_AVX_VPERMIL_PD = 511
|
|
-INTR_X86_AVX_VPERMIL_PD_256 = 512
|
|
-INTR_X86_AVX_VPERMIL_PS = 513
|
|
-INTR_X86_AVX_VPERMIL_PS_256 = 514
|
|
-INTR_X86_AVX_VPERMILVAR_PD = 515
|
|
-INTR_X86_AVX_VPERMILVAR_PD_256 = 516
|
|
-INTR_X86_AVX_VPERMILVAR_PS = 517
|
|
-INTR_X86_AVX_VPERMILVAR_PS_256 = 518
|
|
-INTR_X86_AVX_VTESTC_PD = 519
|
|
-INTR_X86_AVX_VTESTC_PD_256 = 520
|
|
-INTR_X86_AVX_VTESTC_PS = 521
|
|
-INTR_X86_AVX_VTESTC_PS_256 = 522
|
|
-INTR_X86_AVX_VTESTNZC_PD = 523
|
|
-INTR_X86_AVX_VTESTNZC_PD_256 = 524
|
|
-INTR_X86_AVX_VTESTNZC_PS = 525
|
|
-INTR_X86_AVX_VTESTNZC_PS_256 = 526
|
|
-INTR_X86_AVX_VTESTZ_PD = 527
|
|
-INTR_X86_AVX_VTESTZ_PD_256 = 528
|
|
-INTR_X86_AVX_VTESTZ_PS = 529
|
|
-INTR_X86_AVX_VTESTZ_PS_256 = 530
|
|
-INTR_X86_AVX_VZEROALL = 531
|
|
-INTR_X86_AVX_VZEROUPPER = 532
|
|
-INTR_X86_INT = 533
|
|
-INTR_X86_MMX_CVTSI32_SI64 = 534
|
|
-INTR_X86_MMX_CVTSI64_SI32 = 535
|
|
-INTR_X86_MMX_EMMS = 536
|
|
-INTR_X86_MMX_FEMMS = 537
|
|
-INTR_X86_MMX_MASKMOVQ = 538
|
|
-INTR_X86_MMX_MOVNT_DQ = 539
|
|
-INTR_X86_MMX_PACKSSDW = 540
|
|
-INTR_X86_MMX_PACKSSWB = 541
|
|
-INTR_X86_MMX_PACKUSWB = 542
|
|
-INTR_X86_MMX_PADD_B = 543
|
|
-INTR_X86_MMX_PADD_D = 544
|
|
-INTR_X86_MMX_PADD_Q = 545
|
|
-INTR_X86_MMX_PADD_W = 546
|
|
-INTR_X86_MMX_PADDS_B = 547
|
|
-INTR_X86_MMX_PADDS_W = 548
|
|
-INTR_X86_MMX_PADDUS_B = 549
|
|
-INTR_X86_MMX_PADDUS_W = 550
|
|
-INTR_X86_MMX_PAND = 551
|
|
-INTR_X86_MMX_PANDN = 552
|
|
-INTR_X86_MMX_PAVG_B = 553
|
|
-INTR_X86_MMX_PAVG_W = 554
|
|
-INTR_X86_MMX_PCMPEQ_B = 555
|
|
-INTR_X86_MMX_PCMPEQ_D = 556
|
|
-INTR_X86_MMX_PCMPEQ_W = 557
|
|
-INTR_X86_MMX_PCMPGT_B = 558
|
|
-INTR_X86_MMX_PCMPGT_D = 559
|
|
-INTR_X86_MMX_PCMPGT_W = 560
|
|
-INTR_X86_MMX_PEXTR_W = 561
|
|
-INTR_X86_MMX_PINSR_W = 562
|
|
-INTR_X86_MMX_PMADD_WD = 563
|
|
-INTR_X86_MMX_PMAXS_W = 564
|
|
-INTR_X86_MMX_PMAXU_B = 565
|
|
-INTR_X86_MMX_PMINS_W = 566
|
|
-INTR_X86_MMX_PMINU_B = 567
|
|
-INTR_X86_MMX_PMOVMSKB = 568
|
|
-INTR_X86_MMX_PMULH_W = 569
|
|
-INTR_X86_MMX_PMULHU_W = 570
|
|
-INTR_X86_MMX_PMULL_W = 571
|
|
-INTR_X86_MMX_PMULU_DQ = 572
|
|
-INTR_X86_MMX_POR = 573
|
|
-INTR_X86_MMX_PSAD_BW = 574
|
|
-INTR_X86_MMX_PSLL_D = 575
|
|
-INTR_X86_MMX_PSLL_Q = 576
|
|
-INTR_X86_MMX_PSLL_W = 577
|
|
-INTR_X86_MMX_PSLLI_D = 578
|
|
-INTR_X86_MMX_PSLLI_Q = 579
|
|
-INTR_X86_MMX_PSLLI_W = 580
|
|
-INTR_X86_MMX_PSRA_D = 581
|
|
-INTR_X86_MMX_PSRA_W = 582
|
|
-INTR_X86_MMX_PSRAI_D = 583
|
|
-INTR_X86_MMX_PSRAI_W = 584
|
|
-INTR_X86_MMX_PSRL_D = 585
|
|
-INTR_X86_MMX_PSRL_Q = 586
|
|
-INTR_X86_MMX_PSRL_W = 587
|
|
-INTR_X86_MMX_PSRLI_D = 588
|
|
-INTR_X86_MMX_PSRLI_Q = 589
|
|
-INTR_X86_MMX_PSRLI_W = 590
|
|
-INTR_X86_MMX_PSUB_B = 591
|
|
-INTR_X86_MMX_PSUB_D = 592
|
|
-INTR_X86_MMX_PSUB_Q = 593
|
|
-INTR_X86_MMX_PSUB_W = 594
|
|
-INTR_X86_MMX_PSUBS_B = 595
|
|
-INTR_X86_MMX_PSUBS_W = 596
|
|
-INTR_X86_MMX_PSUBUS_B = 597
|
|
-INTR_X86_MMX_PSUBUS_W = 598
|
|
-INTR_X86_MMX_PUNPCKHBW = 599
|
|
-INTR_X86_MMX_PUNPCKHDQ = 600
|
|
-INTR_X86_MMX_PUNPCKHWD = 601
|
|
-INTR_X86_MMX_PUNPCKLBW = 602
|
|
-INTR_X86_MMX_PUNPCKLDQ = 603
|
|
-INTR_X86_MMX_PUNPCKLWD = 604
|
|
-INTR_X86_MMX_PXOR = 605
|
|
-INTR_X86_MMX_VEC_EXT_D = 606
|
|
-INTR_X86_MMX_VEC_INIT_B = 607
|
|
-INTR_X86_MMX_VEC_INIT_D = 608
|
|
-INTR_X86_MMX_VEC_INIT_W = 609
|
|
-INTR_X86_SSE2_ADD_SD = 610
|
|
-INTR_X86_SSE2_CLFLUSH = 611
|
|
-INTR_X86_SSE2_CMP_PD = 612
|
|
-INTR_X86_SSE2_CMP_SD = 613
|
|
-INTR_X86_SSE2_COMIEQ_SD = 614
|
|
-INTR_X86_SSE2_COMIGE_SD = 615
|
|
-INTR_X86_SSE2_COMIGT_SD = 616
|
|
-INTR_X86_SSE2_COMILE_SD = 617
|
|
-INTR_X86_SSE2_COMILT_SD = 618
|
|
-INTR_X86_SSE2_COMINEQ_SD = 619
|
|
-INTR_X86_SSE2_CVTDQ2PD = 620
|
|
-INTR_X86_SSE2_CVTDQ2PS = 621
|
|
-INTR_X86_SSE2_CVTPD2DQ = 622
|
|
-INTR_X86_SSE2_CVTPD2PS = 623
|
|
-INTR_X86_SSE2_CVTPS2DQ = 624
|
|
-INTR_X86_SSE2_CVTPS2PD = 625
|
|
-INTR_X86_SSE2_CVTSD2SI = 626
|
|
-INTR_X86_SSE2_CVTSD2SI64 = 627
|
|
-INTR_X86_SSE2_CVTSD2SS = 628
|
|
-INTR_X86_SSE2_CVTSI2SD = 629
|
|
-INTR_X86_SSE2_CVTSI642SD = 630
|
|
-INTR_X86_SSE2_CVTSS2SD = 631
|
|
-INTR_X86_SSE2_CVTTPD2DQ = 632
|
|
-INTR_X86_SSE2_CVTTPS2DQ = 633
|
|
-INTR_X86_SSE2_CVTTSD2SI = 634
|
|
-INTR_X86_SSE2_CVTTSD2SI64 = 635
|
|
-INTR_X86_SSE2_DIV_SD = 636
|
|
-INTR_X86_SSE2_LFENCE = 637
|
|
-INTR_X86_SSE2_LOADU_DQ = 638
|
|
-INTR_X86_SSE2_LOADU_PD = 639
|
|
-INTR_X86_SSE2_MASKMOV_DQU = 640
|
|
-INTR_X86_SSE2_MAX_PD = 641
|
|
-INTR_X86_SSE2_MAX_SD = 642
|
|
-INTR_X86_SSE2_MFENCE = 643
|
|
-INTR_X86_SSE2_MIN_PD = 644
|
|
-INTR_X86_SSE2_MIN_SD = 645
|
|
-INTR_X86_SSE2_MOVMSK_PD = 646
|
|
-INTR_X86_SSE2_MOVNT_DQ = 647
|
|
-INTR_X86_SSE2_MOVNT_I = 648
|
|
-INTR_X86_SSE2_MOVNT_PD = 649
|
|
-INTR_X86_SSE2_MUL_SD = 650
|
|
-INTR_X86_SSE2_PACKSSDW_128 = 651
|
|
-INTR_X86_SSE2_PACKSSWB_128 = 652
|
|
-INTR_X86_SSE2_PACKUSWB_128 = 653
|
|
-INTR_X86_SSE2_PADDS_B = 654
|
|
-INTR_X86_SSE2_PADDS_W = 655
|
|
-INTR_X86_SSE2_PADDUS_B = 656
|
|
-INTR_X86_SSE2_PADDUS_W = 657
|
|
-INTR_X86_SSE2_PAVG_B = 658
|
|
-INTR_X86_SSE2_PAVG_W = 659
|
|
-INTR_X86_SSE2_PCMPEQ_B = 660
|
|
-INTR_X86_SSE2_PCMPEQ_D = 661
|
|
-INTR_X86_SSE2_PCMPEQ_W = 662
|
|
-INTR_X86_SSE2_PCMPGT_B = 663
|
|
-INTR_X86_SSE2_PCMPGT_D = 664
|
|
-INTR_X86_SSE2_PCMPGT_W = 665
|
|
-INTR_X86_SSE2_PMADD_WD = 666
|
|
-INTR_X86_SSE2_PMAXS_W = 667
|
|
-INTR_X86_SSE2_PMAXU_B = 668
|
|
-INTR_X86_SSE2_PMINS_W = 669
|
|
-INTR_X86_SSE2_PMINU_B = 670
|
|
-INTR_X86_SSE2_PMOVMSKB_128 = 671
|
|
-INTR_X86_SSE2_PMULH_W = 672
|
|
-INTR_X86_SSE2_PMULHU_W = 673
|
|
-INTR_X86_SSE2_PMULU_DQ = 674
|
|
-INTR_X86_SSE2_PSAD_BW = 675
|
|
-INTR_X86_SSE2_PSLL_D = 676
|
|
-INTR_X86_SSE2_PSLL_DQ = 677
|
|
-INTR_X86_SSE2_PSLL_DQ_BS = 678
|
|
-INTR_X86_SSE2_PSLL_Q = 679
|
|
-INTR_X86_SSE2_PSLL_W = 680
|
|
-INTR_X86_SSE2_PSLLI_D = 681
|
|
-INTR_X86_SSE2_PSLLI_Q = 682
|
|
-INTR_X86_SSE2_PSLLI_W = 683
|
|
-INTR_X86_SSE2_PSRA_D = 684
|
|
-INTR_X86_SSE2_PSRA_W = 685
|
|
-INTR_X86_SSE2_PSRAI_D = 686
|
|
-INTR_X86_SSE2_PSRAI_W = 687
|
|
-INTR_X86_SSE2_PSRL_D = 688
|
|
-INTR_X86_SSE2_PSRL_DQ = 689
|
|
-INTR_X86_SSE2_PSRL_DQ_BS = 690
|
|
-INTR_X86_SSE2_PSRL_Q = 691
|
|
-INTR_X86_SSE2_PSRL_W = 692
|
|
-INTR_X86_SSE2_PSRLI_D = 693
|
|
-INTR_X86_SSE2_PSRLI_Q = 694
|
|
-INTR_X86_SSE2_PSRLI_W = 695
|
|
-INTR_X86_SSE2_PSUBS_B = 696
|
|
-INTR_X86_SSE2_PSUBS_W = 697
|
|
-INTR_X86_SSE2_PSUBUS_B = 698
|
|
-INTR_X86_SSE2_PSUBUS_W = 699
|
|
-INTR_X86_SSE2_SQRT_PD = 700
|
|
-INTR_X86_SSE2_SQRT_SD = 701
|
|
-INTR_X86_SSE2_STOREL_DQ = 702
|
|
-INTR_X86_SSE2_STOREU_DQ = 703
|
|
-INTR_X86_SSE2_STOREU_PD = 704
|
|
-INTR_X86_SSE2_SUB_SD = 705
|
|
-INTR_X86_SSE2_UCOMIEQ_SD = 706
|
|
-INTR_X86_SSE2_UCOMIGE_SD = 707
|
|
-INTR_X86_SSE2_UCOMIGT_SD = 708
|
|
-INTR_X86_SSE2_UCOMILE_SD = 709
|
|
-INTR_X86_SSE2_UCOMILT_SD = 710
|
|
-INTR_X86_SSE2_UCOMINEQ_SD = 711
|
|
-INTR_X86_SSE3_ADDSUB_PD = 712
|
|
-INTR_X86_SSE3_ADDSUB_PS = 713
|
|
-INTR_X86_SSE3_HADD_PD = 714
|
|
-INTR_X86_SSE3_HADD_PS = 715
|
|
-INTR_X86_SSE3_HSUB_PD = 716
|
|
-INTR_X86_SSE3_HSUB_PS = 717
|
|
-INTR_X86_SSE3_LDU_DQ = 718
|
|
-INTR_X86_SSE3_MONITOR = 719
|
|
-INTR_X86_SSE3_MWAIT = 720
|
|
-INTR_X86_SSE41_BLENDPD = 721
|
|
-INTR_X86_SSE41_BLENDPS = 722
|
|
-INTR_X86_SSE41_BLENDVPD = 723
|
|
-INTR_X86_SSE41_BLENDVPS = 724
|
|
-INTR_X86_SSE41_DPPD = 725
|
|
-INTR_X86_SSE41_DPPS = 726
|
|
-INTR_X86_SSE41_EXTRACTPS = 727
|
|
-INTR_X86_SSE41_INSERTPS = 728
|
|
-INTR_X86_SSE41_MOVNTDQA = 729
|
|
-INTR_X86_SSE41_MPSADBW = 730
|
|
-INTR_X86_SSE41_PACKUSDW = 731
|
|
-INTR_X86_SSE41_PBLENDVB = 732
|
|
-INTR_X86_SSE41_PBLENDW = 733
|
|
-INTR_X86_SSE41_PCMPEQQ = 734
|
|
-INTR_X86_SSE41_PEXTRB = 735
|
|
-INTR_X86_SSE41_PEXTRD = 736
|
|
-INTR_X86_SSE41_PEXTRQ = 737
|
|
-INTR_X86_SSE41_PHMINPOSUW = 738
|
|
-INTR_X86_SSE41_PMAXSB = 739
|
|
-INTR_X86_SSE41_PMAXSD = 740
|
|
-INTR_X86_SSE41_PMAXUD = 741
|
|
-INTR_X86_SSE41_PMAXUW = 742
|
|
-INTR_X86_SSE41_PMINSB = 743
|
|
-INTR_X86_SSE41_PMINSD = 744
|
|
-INTR_X86_SSE41_PMINUD = 745
|
|
-INTR_X86_SSE41_PMINUW = 746
|
|
-INTR_X86_SSE41_PMOVSXBD = 747
|
|
-INTR_X86_SSE41_PMOVSXBQ = 748
|
|
-INTR_X86_SSE41_PMOVSXBW = 749
|
|
-INTR_X86_SSE41_PMOVSXDQ = 750
|
|
-INTR_X86_SSE41_PMOVSXWD = 751
|
|
-INTR_X86_SSE41_PMOVSXWQ = 752
|
|
-INTR_X86_SSE41_PMOVZXBD = 753
|
|
-INTR_X86_SSE41_PMOVZXBQ = 754
|
|
-INTR_X86_SSE41_PMOVZXBW = 755
|
|
-INTR_X86_SSE41_PMOVZXDQ = 756
|
|
-INTR_X86_SSE41_PMOVZXWD = 757
|
|
-INTR_X86_SSE41_PMOVZXWQ = 758
|
|
-INTR_X86_SSE41_PMULDQ = 759
|
|
-INTR_X86_SSE41_PTESTC = 760
|
|
-INTR_X86_SSE41_PTESTNZC = 761
|
|
-INTR_X86_SSE41_PTESTZ = 762
|
|
-INTR_X86_SSE41_ROUND_PD = 763
|
|
-INTR_X86_SSE41_ROUND_PS = 764
|
|
-INTR_X86_SSE41_ROUND_SD = 765
|
|
-INTR_X86_SSE41_ROUND_SS = 766
|
|
-INTR_X86_SSE42_CRC32_16 = 767
|
|
-INTR_X86_SSE42_CRC32_32 = 768
|
|
-INTR_X86_SSE42_CRC32_8 = 769
|
|
-INTR_X86_SSE42_CRC64_64 = 770
|
|
-INTR_X86_SSE42_CRC64_8 = 771
|
|
-INTR_X86_SSE42_PCMPESTRI128 = 772
|
|
-INTR_X86_SSE42_PCMPESTRIA128 = 773
|
|
-INTR_X86_SSE42_PCMPESTRIC128 = 774
|
|
-INTR_X86_SSE42_PCMPESTRIO128 = 775
|
|
-INTR_X86_SSE42_PCMPESTRIS128 = 776
|
|
-INTR_X86_SSE42_PCMPESTRIZ128 = 777
|
|
-INTR_X86_SSE42_PCMPESTRM128 = 778
|
|
-INTR_X86_SSE42_PCMPGTQ = 779
|
|
-INTR_X86_SSE42_PCMPISTRI128 = 780
|
|
-INTR_X86_SSE42_PCMPISTRIA128 = 781
|
|
-INTR_X86_SSE42_PCMPISTRIC128 = 782
|
|
-INTR_X86_SSE42_PCMPISTRIO128 = 783
|
|
-INTR_X86_SSE42_PCMPISTRIS128 = 784
|
|
-INTR_X86_SSE42_PCMPISTRIZ128 = 785
|
|
-INTR_X86_SSE42_PCMPISTRM128 = 786
|
|
-INTR_X86_SSE_ADD_SS = 787
|
|
-INTR_X86_SSE_CMP_PS = 788
|
|
-INTR_X86_SSE_CMP_SS = 789
|
|
-INTR_X86_SSE_COMIEQ_SS = 790
|
|
-INTR_X86_SSE_COMIGE_SS = 791
|
|
-INTR_X86_SSE_COMIGT_SS = 792
|
|
-INTR_X86_SSE_COMILE_SS = 793
|
|
-INTR_X86_SSE_COMILT_SS = 794
|
|
-INTR_X86_SSE_COMINEQ_SS = 795
|
|
-INTR_X86_SSE_CVTPD2PI = 796
|
|
-INTR_X86_SSE_CVTPI2PD = 797
|
|
-INTR_X86_SSE_CVTPI2PS = 798
|
|
-INTR_X86_SSE_CVTPS2PI = 799
|
|
-INTR_X86_SSE_CVTSI2SS = 800
|
|
-INTR_X86_SSE_CVTSI642SS = 801
|
|
-INTR_X86_SSE_CVTSS2SI = 802
|
|
-INTR_X86_SSE_CVTSS2SI64 = 803
|
|
-INTR_X86_SSE_CVTTPD2PI = 804
|
|
-INTR_X86_SSE_CVTTPS2PI = 805
|
|
-INTR_X86_SSE_CVTTSS2SI = 806
|
|
-INTR_X86_SSE_CVTTSS2SI64 = 807
|
|
-INTR_X86_SSE_DIV_SS = 808
|
|
-INTR_X86_SSE_LDMXCSR = 809
|
|
-INTR_X86_SSE_LOADU_PS = 810
|
|
-INTR_X86_SSE_MAX_PS = 811
|
|
-INTR_X86_SSE_MAX_SS = 812
|
|
-INTR_X86_SSE_MIN_PS = 813
|
|
-INTR_X86_SSE_MIN_SS = 814
|
|
-INTR_X86_SSE_MOVMSK_PS = 815
|
|
-INTR_X86_SSE_MOVNT_PS = 816
|
|
-INTR_X86_SSE_MUL_SS = 817
|
|
-INTR_X86_SSE_RCP_PS = 818
|
|
-INTR_X86_SSE_RCP_SS = 819
|
|
-INTR_X86_SSE_RSQRT_PS = 820
|
|
-INTR_X86_SSE_RSQRT_SS = 821
|
|
-INTR_X86_SSE_SFENCE = 822
|
|
-INTR_X86_SSE_SQRT_PS = 823
|
|
-INTR_X86_SSE_SQRT_SS = 824
|
|
-INTR_X86_SSE_STMXCSR = 825
|
|
-INTR_X86_SSE_STOREU_PS = 826
|
|
-INTR_X86_SSE_SUB_SS = 827
|
|
-INTR_X86_SSE_UCOMIEQ_SS = 828
|
|
-INTR_X86_SSE_UCOMIGE_SS = 829
|
|
-INTR_X86_SSE_UCOMIGT_SS = 830
|
|
-INTR_X86_SSE_UCOMILE_SS = 831
|
|
-INTR_X86_SSE_UCOMILT_SS = 832
|
|
-INTR_X86_SSE_UCOMINEQ_SS = 833
|
|
-INTR_X86_SSSE3_PABS_B = 834
|
|
-INTR_X86_SSSE3_PABS_B_128 = 835
|
|
-INTR_X86_SSSE3_PABS_D = 836
|
|
-INTR_X86_SSSE3_PABS_D_128 = 837
|
|
-INTR_X86_SSSE3_PABS_W = 838
|
|
-INTR_X86_SSSE3_PABS_W_128 = 839
|
|
-INTR_X86_SSSE3_PHADD_D = 840
|
|
-INTR_X86_SSSE3_PHADD_D_128 = 841
|
|
-INTR_X86_SSSE3_PHADD_SW = 842
|
|
-INTR_X86_SSSE3_PHADD_SW_128 = 843
|
|
-INTR_X86_SSSE3_PHADD_W = 844
|
|
-INTR_X86_SSSE3_PHADD_W_128 = 845
|
|
-INTR_X86_SSSE3_PHSUB_D = 846
|
|
-INTR_X86_SSSE3_PHSUB_D_128 = 847
|
|
-INTR_X86_SSSE3_PHSUB_SW = 848
|
|
-INTR_X86_SSSE3_PHSUB_SW_128 = 849
|
|
-INTR_X86_SSSE3_PHSUB_W = 850
|
|
-INTR_X86_SSSE3_PHSUB_W_128 = 851
|
|
-INTR_X86_SSSE3_PMADD_UB_SW = 852
|
|
-INTR_X86_SSSE3_PMADD_UB_SW_128 = 853
|
|
-INTR_X86_SSSE3_PMUL_HR_SW = 854
|
|
-INTR_X86_SSSE3_PMUL_HR_SW_128 = 855
|
|
-INTR_X86_SSSE3_PSHUF_B = 856
|
|
-INTR_X86_SSSE3_PSHUF_B_128 = 857
|
|
-INTR_X86_SSSE3_PSHUF_W = 858
|
|
-INTR_X86_SSSE3_PSIGN_B = 859
|
|
-INTR_X86_SSSE3_PSIGN_B_128 = 860
|
|
-INTR_X86_SSSE3_PSIGN_D = 861
|
|
-INTR_X86_SSSE3_PSIGN_D_128 = 862
|
|
-INTR_X86_SSSE3_PSIGN_W = 863
|
|
-INTR_X86_SSSE3_PSIGN_W_128 = 864
|
|
-INTR_XCORE_BITREV = 865
|
|
-INTR_XCORE_GETID = 866
|
|
-
|
|
+INTR_ARM_NEON_VCVTFP2HF = 17
|
|
+INTR_ARM_NEON_VCVTFXS2FP = 18
|
|
+INTR_ARM_NEON_VCVTFXU2FP = 19
|
|
+INTR_ARM_NEON_VCVTHF2FP = 20
|
|
+INTR_ARM_NEON_VHADDS = 21
|
|
+INTR_ARM_NEON_VHADDU = 22
|
|
+INTR_ARM_NEON_VHSUBS = 23
|
|
+INTR_ARM_NEON_VHSUBU = 24
|
|
+INTR_ARM_NEON_VLD1 = 25
|
|
+INTR_ARM_NEON_VLD2 = 26
|
|
+INTR_ARM_NEON_VLD2LANE = 27
|
|
+INTR_ARM_NEON_VLD3 = 28
|
|
+INTR_ARM_NEON_VLD3LANE = 29
|
|
+INTR_ARM_NEON_VLD4 = 30
|
|
+INTR_ARM_NEON_VLD4LANE = 31
|
|
+INTR_ARM_NEON_VMAXS = 32
|
|
+INTR_ARM_NEON_VMAXU = 33
|
|
+INTR_ARM_NEON_VMINS = 34
|
|
+INTR_ARM_NEON_VMINU = 35
|
|
+INTR_ARM_NEON_VMULLP = 36
|
|
+INTR_ARM_NEON_VMULP = 37
|
|
+INTR_ARM_NEON_VPADALS = 38
|
|
+INTR_ARM_NEON_VPADALU = 39
|
|
+INTR_ARM_NEON_VPADD = 40
|
|
+INTR_ARM_NEON_VPADDLS = 41
|
|
+INTR_ARM_NEON_VPADDLU = 42
|
|
+INTR_ARM_NEON_VPMAXS = 43
|
|
+INTR_ARM_NEON_VPMAXU = 44
|
|
+INTR_ARM_NEON_VPMINS = 45
|
|
+INTR_ARM_NEON_VPMINU = 46
|
|
+INTR_ARM_NEON_VQABS = 47
|
|
+INTR_ARM_NEON_VQADDS = 48
|
|
+INTR_ARM_NEON_VQADDU = 49
|
|
+INTR_ARM_NEON_VQDMLAL = 50
|
|
+INTR_ARM_NEON_VQDMLSL = 51
|
|
+INTR_ARM_NEON_VQDMULH = 52
|
|
+INTR_ARM_NEON_VQDMULL = 53
|
|
+INTR_ARM_NEON_VQMOVNS = 54
|
|
+INTR_ARM_NEON_VQMOVNSU = 55
|
|
+INTR_ARM_NEON_VQMOVNU = 56
|
|
+INTR_ARM_NEON_VQNEG = 57
|
|
+INTR_ARM_NEON_VQRDMULH = 58
|
|
+INTR_ARM_NEON_VQRSHIFTNS = 59
|
|
+INTR_ARM_NEON_VQRSHIFTNSU = 60
|
|
+INTR_ARM_NEON_VQRSHIFTNU = 61
|
|
+INTR_ARM_NEON_VQRSHIFTS = 62
|
|
+INTR_ARM_NEON_VQRSHIFTU = 63
|
|
+INTR_ARM_NEON_VQSHIFTNS = 64
|
|
+INTR_ARM_NEON_VQSHIFTNSU = 65
|
|
+INTR_ARM_NEON_VQSHIFTNU = 66
|
|
+INTR_ARM_NEON_VQSHIFTS = 67
|
|
+INTR_ARM_NEON_VQSHIFTSU = 68
|
|
+INTR_ARM_NEON_VQSHIFTU = 69
|
|
+INTR_ARM_NEON_VQSUBS = 70
|
|
+INTR_ARM_NEON_VQSUBU = 71
|
|
+INTR_ARM_NEON_VRADDHN = 72
|
|
+INTR_ARM_NEON_VRECPE = 73
|
|
+INTR_ARM_NEON_VRECPS = 74
|
|
+INTR_ARM_NEON_VRHADDS = 75
|
|
+INTR_ARM_NEON_VRHADDU = 76
|
|
+INTR_ARM_NEON_VRSHIFTN = 77
|
|
+INTR_ARM_NEON_VRSHIFTS = 78
|
|
+INTR_ARM_NEON_VRSHIFTU = 79
|
|
+INTR_ARM_NEON_VRSQRTE = 80
|
|
+INTR_ARM_NEON_VRSQRTS = 81
|
|
+INTR_ARM_NEON_VRSUBHN = 82
|
|
+INTR_ARM_NEON_VSHIFTINS = 83
|
|
+INTR_ARM_NEON_VSHIFTLS = 84
|
|
+INTR_ARM_NEON_VSHIFTLU = 85
|
|
+INTR_ARM_NEON_VSHIFTN = 86
|
|
+INTR_ARM_NEON_VSHIFTS = 87
|
|
+INTR_ARM_NEON_VSHIFTU = 88
|
|
+INTR_ARM_NEON_VST1 = 89
|
|
+INTR_ARM_NEON_VST2 = 90
|
|
+INTR_ARM_NEON_VST2LANE = 91
|
|
+INTR_ARM_NEON_VST3 = 92
|
|
+INTR_ARM_NEON_VST3LANE = 93
|
|
+INTR_ARM_NEON_VST4 = 94
|
|
+INTR_ARM_NEON_VST4LANE = 95
|
|
+INTR_ARM_NEON_VSUBHN = 96
|
|
+INTR_ARM_NEON_VTBL1 = 97
|
|
+INTR_ARM_NEON_VTBL2 = 98
|
|
+INTR_ARM_NEON_VTBL3 = 99
|
|
+INTR_ARM_NEON_VTBL4 = 100
|
|
+INTR_ARM_NEON_VTBX1 = 101
|
|
+INTR_ARM_NEON_VTBX2 = 102
|
|
+INTR_ARM_NEON_VTBX3 = 103
|
|
+INTR_ARM_NEON_VTBX4 = 104
|
|
+INTR_ARM_QADD = 105
|
|
+INTR_ARM_QSUB = 106
|
|
+INTR_ARM_SET_FPSCR = 107
|
|
+INTR_ARM_SSAT = 108
|
|
+INTR_ARM_THREAD_POINTER = 109
|
|
+INTR_ARM_USAT = 110
|
|
+INTR_ARM_VCVTR = 111
|
|
+INTR_ARM_VCVTRU = 112
|
|
+INTR_ATOMIC_CMP_SWAP = 113
|
|
+INTR_ATOMIC_LOAD_ADD = 114
|
|
+INTR_ATOMIC_LOAD_AND = 115
|
|
+INTR_ATOMIC_LOAD_MAX = 116
|
|
+INTR_ATOMIC_LOAD_MIN = 117
|
|
+INTR_ATOMIC_LOAD_NAND = 118
|
|
+INTR_ATOMIC_LOAD_OR = 119
|
|
+INTR_ATOMIC_LOAD_SUB = 120
|
|
+INTR_ATOMIC_LOAD_UMAX = 121
|
|
+INTR_ATOMIC_LOAD_UMIN = 122
|
|
+INTR_ATOMIC_LOAD_XOR = 123
|
|
+INTR_ATOMIC_SWAP = 124
|
|
+INTR_BSWAP = 125
|
|
+INTR_CONVERT_FROM_FP16 = 126
|
|
+INTR_CONVERT_TO_FP16 = 127
|
|
+INTR_CONVERTFF = 128
|
|
+INTR_CONVERTFSI = 129
|
|
+INTR_CONVERTFUI = 130
|
|
+INTR_CONVERTSIF = 131
|
|
+INTR_CONVERTSS = 132
|
|
+INTR_CONVERTSU = 133
|
|
+INTR_CONVERTUIF = 134
|
|
+INTR_CONVERTUS = 135
|
|
+INTR_CONVERTUU = 136
|
|
+INTR_COS = 137
|
|
+INTR_CTLZ = 138
|
|
+INTR_CTPOP = 139
|
|
+INTR_CTTZ = 140
|
|
+INTR_DBG_DECLARE = 141
|
|
+INTR_DBG_VALUE = 142
|
|
+INTR_EH_DWARF_CFA = 143
|
|
+INTR_EH_EXCEPTION = 144
|
|
+INTR_EH_RETURN_I32 = 145
|
|
+INTR_EH_RETURN_I64 = 146
|
|
+INTR_EH_SELECTOR = 147
|
|
+INTR_EH_SJLJ_CALLSITE = 148
|
|
+INTR_EH_SJLJ_DISPATCH_SETUP = 149
|
|
+INTR_EH_SJLJ_LONGJMP = 150
|
|
+INTR_EH_SJLJ_LSDA = 151
|
|
+INTR_EH_SJLJ_SETJMP = 152
|
|
+INTR_EH_TYPEID_FOR = 153
|
|
+INTR_EH_UNWIND_INIT = 154
|
|
+INTR_EXP = 155
|
|
+INTR_EXP2 = 156
|
|
+INTR_FLT_ROUNDS = 157
|
|
+INTR_FRAMEADDRESS = 158
|
|
+INTR_GCREAD = 159
|
|
+INTR_GCROOT = 160
|
|
+INTR_GCWRITE = 161
|
|
+INTR_INIT_TRAMPOLINE = 162
|
|
+INTR_INVARIANT_END = 163
|
|
+INTR_INVARIANT_START = 164
|
|
+INTR_LIFETIME_END = 165
|
|
+INTR_LIFETIME_START = 166
|
|
+INTR_LOG = 167
|
|
+INTR_LOG10 = 168
|
|
+INTR_LOG2 = 169
|
|
+INTR_LONGJMP = 170
|
|
+INTR_MEMCPY = 171
|
|
+INTR_MEMMOVE = 172
|
|
+INTR_MEMORY_BARRIER = 173
|
|
+INTR_MEMSET = 174
|
|
+INTR_OBJECTSIZE = 175
|
|
+INTR_PCMARKER = 176
|
|
+INTR_POW = 177
|
|
+INTR_POWI = 178
|
|
+INTR_PPC_ALTIVEC_DSS = 179
|
|
+INTR_PPC_ALTIVEC_DSSALL = 180
|
|
+INTR_PPC_ALTIVEC_DST = 181
|
|
+INTR_PPC_ALTIVEC_DSTST = 182
|
|
+INTR_PPC_ALTIVEC_DSTSTT = 183
|
|
+INTR_PPC_ALTIVEC_DSTT = 184
|
|
+INTR_PPC_ALTIVEC_LVEBX = 185
|
|
+INTR_PPC_ALTIVEC_LVEHX = 186
|
|
+INTR_PPC_ALTIVEC_LVEWX = 187
|
|
+INTR_PPC_ALTIVEC_LVSL = 188
|
|
+INTR_PPC_ALTIVEC_LVSR = 189
|
|
+INTR_PPC_ALTIVEC_LVX = 190
|
|
+INTR_PPC_ALTIVEC_LVXL = 191
|
|
+INTR_PPC_ALTIVEC_MFVSCR = 192
|
|
+INTR_PPC_ALTIVEC_MTVSCR = 193
|
|
+INTR_PPC_ALTIVEC_STVEBX = 194
|
|
+INTR_PPC_ALTIVEC_STVEHX = 195
|
|
+INTR_PPC_ALTIVEC_STVEWX = 196
|
|
+INTR_PPC_ALTIVEC_STVX = 197
|
|
+INTR_PPC_ALTIVEC_STVXL = 198
|
|
+INTR_PPC_ALTIVEC_VADDCUW = 199
|
|
+INTR_PPC_ALTIVEC_VADDSBS = 200
|
|
+INTR_PPC_ALTIVEC_VADDSHS = 201
|
|
+INTR_PPC_ALTIVEC_VADDSWS = 202
|
|
+INTR_PPC_ALTIVEC_VADDUBS = 203
|
|
+INTR_PPC_ALTIVEC_VADDUHS = 204
|
|
+INTR_PPC_ALTIVEC_VADDUWS = 205
|
|
+INTR_PPC_ALTIVEC_VAVGSB = 206
|
|
+INTR_PPC_ALTIVEC_VAVGSH = 207
|
|
+INTR_PPC_ALTIVEC_VAVGSW = 208
|
|
+INTR_PPC_ALTIVEC_VAVGUB = 209
|
|
+INTR_PPC_ALTIVEC_VAVGUH = 210
|
|
+INTR_PPC_ALTIVEC_VAVGUW = 211
|
|
+INTR_PPC_ALTIVEC_VCFSX = 212
|
|
+INTR_PPC_ALTIVEC_VCFUX = 213
|
|
+INTR_PPC_ALTIVEC_VCMPBFP = 214
|
|
+INTR_PPC_ALTIVEC_VCMPBFP_P = 215
|
|
+INTR_PPC_ALTIVEC_VCMPEQFP = 216
|
|
+INTR_PPC_ALTIVEC_VCMPEQFP_P = 217
|
|
+INTR_PPC_ALTIVEC_VCMPEQUB = 218
|
|
+INTR_PPC_ALTIVEC_VCMPEQUB_P = 219
|
|
+INTR_PPC_ALTIVEC_VCMPEQUH = 220
|
|
+INTR_PPC_ALTIVEC_VCMPEQUH_P = 221
|
|
+INTR_PPC_ALTIVEC_VCMPEQUW = 222
|
|
+INTR_PPC_ALTIVEC_VCMPEQUW_P = 223
|
|
+INTR_PPC_ALTIVEC_VCMPGEFP = 224
|
|
+INTR_PPC_ALTIVEC_VCMPGEFP_P = 225
|
|
+INTR_PPC_ALTIVEC_VCMPGTFP = 226
|
|
+INTR_PPC_ALTIVEC_VCMPGTFP_P = 227
|
|
+INTR_PPC_ALTIVEC_VCMPGTSB = 228
|
|
+INTR_PPC_ALTIVEC_VCMPGTSB_P = 229
|
|
+INTR_PPC_ALTIVEC_VCMPGTSH = 230
|
|
+INTR_PPC_ALTIVEC_VCMPGTSH_P = 231
|
|
+INTR_PPC_ALTIVEC_VCMPGTSW = 232
|
|
+INTR_PPC_ALTIVEC_VCMPGTSW_P = 233
|
|
+INTR_PPC_ALTIVEC_VCMPGTUB = 234
|
|
+INTR_PPC_ALTIVEC_VCMPGTUB_P = 235
|
|
+INTR_PPC_ALTIVEC_VCMPGTUH = 236
|
|
+INTR_PPC_ALTIVEC_VCMPGTUH_P = 237
|
|
+INTR_PPC_ALTIVEC_VCMPGTUW = 238
|
|
+INTR_PPC_ALTIVEC_VCMPGTUW_P = 239
|
|
+INTR_PPC_ALTIVEC_VCTSXS = 240
|
|
+INTR_PPC_ALTIVEC_VCTUXS = 241
|
|
+INTR_PPC_ALTIVEC_VEXPTEFP = 242
|
|
+INTR_PPC_ALTIVEC_VLOGEFP = 243
|
|
+INTR_PPC_ALTIVEC_VMADDFP = 244
|
|
+INTR_PPC_ALTIVEC_VMAXFP = 245
|
|
+INTR_PPC_ALTIVEC_VMAXSB = 246
|
|
+INTR_PPC_ALTIVEC_VMAXSH = 247
|
|
+INTR_PPC_ALTIVEC_VMAXSW = 248
|
|
+INTR_PPC_ALTIVEC_VMAXUB = 249
|
|
+INTR_PPC_ALTIVEC_VMAXUH = 250
|
|
+INTR_PPC_ALTIVEC_VMAXUW = 251
|
|
+INTR_PPC_ALTIVEC_VMHADDSHS = 252
|
|
+INTR_PPC_ALTIVEC_VMHRADDSHS = 253
|
|
+INTR_PPC_ALTIVEC_VMINFP = 254
|
|
+INTR_PPC_ALTIVEC_VMINSB = 255
|
|
+INTR_PPC_ALTIVEC_VMINSH = 256
|
|
+INTR_PPC_ALTIVEC_VMINSW = 257
|
|
+INTR_PPC_ALTIVEC_VMINUB = 258
|
|
+INTR_PPC_ALTIVEC_VMINUH = 259
|
|
+INTR_PPC_ALTIVEC_VMINUW = 260
|
|
+INTR_PPC_ALTIVEC_VMLADDUHM = 261
|
|
+INTR_PPC_ALTIVEC_VMSUMMBM = 262
|
|
+INTR_PPC_ALTIVEC_VMSUMSHM = 263
|
|
+INTR_PPC_ALTIVEC_VMSUMSHS = 264
|
|
+INTR_PPC_ALTIVEC_VMSUMUBM = 265
|
|
+INTR_PPC_ALTIVEC_VMSUMUHM = 266
|
|
+INTR_PPC_ALTIVEC_VMSUMUHS = 267
|
|
+INTR_PPC_ALTIVEC_VMULESB = 268
|
|
+INTR_PPC_ALTIVEC_VMULESH = 269
|
|
+INTR_PPC_ALTIVEC_VMULEUB = 270
|
|
+INTR_PPC_ALTIVEC_VMULEUH = 271
|
|
+INTR_PPC_ALTIVEC_VMULOSB = 272
|
|
+INTR_PPC_ALTIVEC_VMULOSH = 273
|
|
+INTR_PPC_ALTIVEC_VMULOUB = 274
|
|
+INTR_PPC_ALTIVEC_VMULOUH = 275
|
|
+INTR_PPC_ALTIVEC_VNMSUBFP = 276
|
|
+INTR_PPC_ALTIVEC_VPERM = 277
|
|
+INTR_PPC_ALTIVEC_VPKPX = 278
|
|
+INTR_PPC_ALTIVEC_VPKSHSS = 279
|
|
+INTR_PPC_ALTIVEC_VPKSHUS = 280
|
|
+INTR_PPC_ALTIVEC_VPKSWSS = 281
|
|
+INTR_PPC_ALTIVEC_VPKSWUS = 282
|
|
+INTR_PPC_ALTIVEC_VPKUHUS = 283
|
|
+INTR_PPC_ALTIVEC_VPKUWUS = 284
|
|
+INTR_PPC_ALTIVEC_VREFP = 285
|
|
+INTR_PPC_ALTIVEC_VRFIM = 286
|
|
+INTR_PPC_ALTIVEC_VRFIN = 287
|
|
+INTR_PPC_ALTIVEC_VRFIP = 288
|
|
+INTR_PPC_ALTIVEC_VRFIZ = 289
|
|
+INTR_PPC_ALTIVEC_VRLB = 290
|
|
+INTR_PPC_ALTIVEC_VRLH = 291
|
|
+INTR_PPC_ALTIVEC_VRLW = 292
|
|
+INTR_PPC_ALTIVEC_VRSQRTEFP = 293
|
|
+INTR_PPC_ALTIVEC_VSEL = 294
|
|
+INTR_PPC_ALTIVEC_VSL = 295
|
|
+INTR_PPC_ALTIVEC_VSLB = 296
|
|
+INTR_PPC_ALTIVEC_VSLH = 297
|
|
+INTR_PPC_ALTIVEC_VSLO = 298
|
|
+INTR_PPC_ALTIVEC_VSLW = 299
|
|
+INTR_PPC_ALTIVEC_VSR = 300
|
|
+INTR_PPC_ALTIVEC_VSRAB = 301
|
|
+INTR_PPC_ALTIVEC_VSRAH = 302
|
|
+INTR_PPC_ALTIVEC_VSRAW = 303
|
|
+INTR_PPC_ALTIVEC_VSRB = 304
|
|
+INTR_PPC_ALTIVEC_VSRH = 305
|
|
+INTR_PPC_ALTIVEC_VSRO = 306
|
|
+INTR_PPC_ALTIVEC_VSRW = 307
|
|
+INTR_PPC_ALTIVEC_VSUBCUW = 308
|
|
+INTR_PPC_ALTIVEC_VSUBSBS = 309
|
|
+INTR_PPC_ALTIVEC_VSUBSHS = 310
|
|
+INTR_PPC_ALTIVEC_VSUBSWS = 311
|
|
+INTR_PPC_ALTIVEC_VSUBUBS = 312
|
|
+INTR_PPC_ALTIVEC_VSUBUHS = 313
|
|
+INTR_PPC_ALTIVEC_VSUBUWS = 314
|
|
+INTR_PPC_ALTIVEC_VSUM2SWS = 315
|
|
+INTR_PPC_ALTIVEC_VSUM4SBS = 316
|
|
+INTR_PPC_ALTIVEC_VSUM4SHS = 317
|
|
+INTR_PPC_ALTIVEC_VSUM4UBS = 318
|
|
+INTR_PPC_ALTIVEC_VSUMSWS = 319
|
|
+INTR_PPC_ALTIVEC_VUPKHPX = 320
|
|
+INTR_PPC_ALTIVEC_VUPKHSB = 321
|
|
+INTR_PPC_ALTIVEC_VUPKHSH = 322
|
|
+INTR_PPC_ALTIVEC_VUPKLPX = 323
|
|
+INTR_PPC_ALTIVEC_VUPKLSB = 324
|
|
+INTR_PPC_ALTIVEC_VUPKLSH = 325
|
|
+INTR_PPC_DCBA = 326
|
|
+INTR_PPC_DCBF = 327
|
|
+INTR_PPC_DCBI = 328
|
|
+INTR_PPC_DCBST = 329
|
|
+INTR_PPC_DCBT = 330
|
|
+INTR_PPC_DCBTST = 331
|
|
+INTR_PPC_DCBZ = 332
|
|
+INTR_PPC_DCBZL = 333
|
|
+INTR_PPC_SYNC = 334
|
|
+INTR_PREFETCH = 335
|
|
+INTR_PTR_ANNOTATION = 336
|
|
+INTR_PTX_BAR_SYNC = 337
|
|
+INTR_PTX_READ_TID_R64 = 338
|
|
+INTR_PTX_READ_TID_V4I16 = 339
|
|
+INTR_PTX_READ_TID_W = 340
|
|
+INTR_PTX_READ_TID_X = 341
|
|
+INTR_PTX_READ_TID_Y = 342
|
|
+INTR_PTX_READ_TID_Z = 343
|
|
+INTR_READCYCLECOUNTER = 344
|
|
+INTR_RETURNADDRESS = 345
|
|
+INTR_SADD_WITH_OVERFLOW = 346
|
|
+INTR_SETJMP = 347
|
|
+INTR_SIGLONGJMP = 348
|
|
+INTR_SIGSETJMP = 349
|
|
+INTR_SIN = 350
|
|
+INTR_SMUL_WITH_OVERFLOW = 351
|
|
+INTR_SPU_SI_A = 352
|
|
+INTR_SPU_SI_ADDX = 353
|
|
+INTR_SPU_SI_AH = 354
|
|
+INTR_SPU_SI_AHI = 355
|
|
+INTR_SPU_SI_AI = 356
|
|
+INTR_SPU_SI_AND = 357
|
|
+INTR_SPU_SI_ANDBI = 358
|
|
+INTR_SPU_SI_ANDC = 359
|
|
+INTR_SPU_SI_ANDHI = 360
|
|
+INTR_SPU_SI_ANDI = 361
|
|
+INTR_SPU_SI_BG = 362
|
|
+INTR_SPU_SI_BGX = 363
|
|
+INTR_SPU_SI_CEQ = 364
|
|
+INTR_SPU_SI_CEQB = 365
|
|
+INTR_SPU_SI_CEQBI = 366
|
|
+INTR_SPU_SI_CEQH = 367
|
|
+INTR_SPU_SI_CEQHI = 368
|
|
+INTR_SPU_SI_CEQI = 369
|
|
+INTR_SPU_SI_CG = 370
|
|
+INTR_SPU_SI_CGT = 371
|
|
+INTR_SPU_SI_CGTB = 372
|
|
+INTR_SPU_SI_CGTBI = 373
|
|
+INTR_SPU_SI_CGTH = 374
|
|
+INTR_SPU_SI_CGTHI = 375
|
|
+INTR_SPU_SI_CGTI = 376
|
|
+INTR_SPU_SI_CGX = 377
|
|
+INTR_SPU_SI_CLGT = 378
|
|
+INTR_SPU_SI_CLGTB = 379
|
|
+INTR_SPU_SI_CLGTBI = 380
|
|
+INTR_SPU_SI_CLGTH = 381
|
|
+INTR_SPU_SI_CLGTHI = 382
|
|
+INTR_SPU_SI_CLGTI = 383
|
|
+INTR_SPU_SI_DFA = 384
|
|
+INTR_SPU_SI_DFM = 385
|
|
+INTR_SPU_SI_DFMA = 386
|
|
+INTR_SPU_SI_DFMS = 387
|
|
+INTR_SPU_SI_DFNMA = 388
|
|
+INTR_SPU_SI_DFNMS = 389
|
|
+INTR_SPU_SI_DFS = 390
|
|
+INTR_SPU_SI_FA = 391
|
|
+INTR_SPU_SI_FCEQ = 392
|
|
+INTR_SPU_SI_FCGT = 393
|
|
+INTR_SPU_SI_FCMEQ = 394
|
|
+INTR_SPU_SI_FCMGT = 395
|
|
+INTR_SPU_SI_FM = 396
|
|
+INTR_SPU_SI_FMA = 397
|
|
+INTR_SPU_SI_FMS = 398
|
|
+INTR_SPU_SI_FNMS = 399
|
|
+INTR_SPU_SI_FS = 400
|
|
+INTR_SPU_SI_FSMBI = 401
|
|
+INTR_SPU_SI_MPY = 402
|
|
+INTR_SPU_SI_MPYA = 403
|
|
+INTR_SPU_SI_MPYH = 404
|
|
+INTR_SPU_SI_MPYHH = 405
|
|
+INTR_SPU_SI_MPYHHA = 406
|
|
+INTR_SPU_SI_MPYHHAU = 407
|
|
+INTR_SPU_SI_MPYHHU = 408
|
|
+INTR_SPU_SI_MPYI = 409
|
|
+INTR_SPU_SI_MPYS = 410
|
|
+INTR_SPU_SI_MPYU = 411
|
|
+INTR_SPU_SI_MPYUI = 412
|
|
+INTR_SPU_SI_NAND = 413
|
|
+INTR_SPU_SI_NOR = 414
|
|
+INTR_SPU_SI_OR = 415
|
|
+INTR_SPU_SI_ORBI = 416
|
|
+INTR_SPU_SI_ORC = 417
|
|
+INTR_SPU_SI_ORHI = 418
|
|
+INTR_SPU_SI_ORI = 419
|
|
+INTR_SPU_SI_SF = 420
|
|
+INTR_SPU_SI_SFH = 421
|
|
+INTR_SPU_SI_SFHI = 422
|
|
+INTR_SPU_SI_SFI = 423
|
|
+INTR_SPU_SI_SFX = 424
|
|
+INTR_SPU_SI_SHLI = 425
|
|
+INTR_SPU_SI_SHLQBI = 426
|
|
+INTR_SPU_SI_SHLQBII = 427
|
|
+INTR_SPU_SI_SHLQBY = 428
|
|
+INTR_SPU_SI_SHLQBYI = 429
|
|
+INTR_SPU_SI_XOR = 430
|
|
+INTR_SPU_SI_XORBI = 431
|
|
+INTR_SPU_SI_XORHI = 432
|
|
+INTR_SPU_SI_XORI = 433
|
|
+INTR_SQRT = 434
|
|
+INTR_SSUB_WITH_OVERFLOW = 435
|
|
+INTR_STACKPROTECTOR = 436
|
|
+INTR_STACKRESTORE = 437
|
|
+INTR_STACKSAVE = 438
|
|
+INTR_TRAP = 439
|
|
+INTR_UADD_WITH_OVERFLOW = 440
|
|
+INTR_UMUL_WITH_OVERFLOW = 441
|
|
+INTR_USUB_WITH_OVERFLOW = 442
|
|
+INTR_VACOPY = 443
|
|
+INTR_VAEND = 444
|
|
+INTR_VAR_ANNOTATION = 445
|
|
+INTR_VASTART = 446
|
|
+INTR_X86_AESNI_AESDEC = 447
|
|
+INTR_X86_AESNI_AESDECLAST = 448
|
|
+INTR_X86_AESNI_AESENC = 449
|
|
+INTR_X86_AESNI_AESENCLAST = 450
|
|
+INTR_X86_AESNI_AESIMC = 451
|
|
+INTR_X86_AESNI_AESKEYGENASSIST = 452
|
|
+INTR_X86_AVX_ADDSUB_PD_256 = 453
|
|
+INTR_X86_AVX_ADDSUB_PS_256 = 454
|
|
+INTR_X86_AVX_BLEND_PD_256 = 455
|
|
+INTR_X86_AVX_BLEND_PS_256 = 456
|
|
+INTR_X86_AVX_BLENDV_PD_256 = 457
|
|
+INTR_X86_AVX_BLENDV_PS_256 = 458
|
|
+INTR_X86_AVX_CMP_PD_256 = 459
|
|
+INTR_X86_AVX_CMP_PS_256 = 460
|
|
+INTR_X86_AVX_CVT_PD2_PS_256 = 461
|
|
+INTR_X86_AVX_CVT_PD2DQ_256 = 462
|
|
+INTR_X86_AVX_CVT_PS2_PD_256 = 463
|
|
+INTR_X86_AVX_CVT_PS2DQ_256 = 464
|
|
+INTR_X86_AVX_CVTDQ2_PD_256 = 465
|
|
+INTR_X86_AVX_CVTDQ2_PS_256 = 466
|
|
+INTR_X86_AVX_CVTT_PD2DQ_256 = 467
|
|
+INTR_X86_AVX_CVTT_PS2DQ_256 = 468
|
|
+INTR_X86_AVX_DP_PS_256 = 469
|
|
+INTR_X86_AVX_HADD_PD_256 = 470
|
|
+INTR_X86_AVX_HADD_PS_256 = 471
|
|
+INTR_X86_AVX_HSUB_PD_256 = 472
|
|
+INTR_X86_AVX_HSUB_PS_256 = 473
|
|
+INTR_X86_AVX_LDU_DQ_256 = 474
|
|
+INTR_X86_AVX_LOADU_DQ_256 = 475
|
|
+INTR_X86_AVX_LOADU_PD_256 = 476
|
|
+INTR_X86_AVX_LOADU_PS_256 = 477
|
|
+INTR_X86_AVX_MASKLOAD_PD = 478
|
|
+INTR_X86_AVX_MASKLOAD_PD_256 = 479
|
|
+INTR_X86_AVX_MASKLOAD_PS = 480
|
|
+INTR_X86_AVX_MASKLOAD_PS_256 = 481
|
|
+INTR_X86_AVX_MASKSTORE_PD = 482
|
|
+INTR_X86_AVX_MASKSTORE_PD_256 = 483
|
|
+INTR_X86_AVX_MASKSTORE_PS = 484
|
|
+INTR_X86_AVX_MASKSTORE_PS_256 = 485
|
|
+INTR_X86_AVX_MAX_PD_256 = 486
|
|
+INTR_X86_AVX_MAX_PS_256 = 487
|
|
+INTR_X86_AVX_MIN_PD_256 = 488
|
|
+INTR_X86_AVX_MIN_PS_256 = 489
|
|
+INTR_X86_AVX_MOVMSK_PD_256 = 490
|
|
+INTR_X86_AVX_MOVMSK_PS_256 = 491
|
|
+INTR_X86_AVX_MOVNT_DQ_256 = 492
|
|
+INTR_X86_AVX_MOVNT_PD_256 = 493
|
|
+INTR_X86_AVX_MOVNT_PS_256 = 494
|
|
+INTR_X86_AVX_PTESTC_256 = 495
|
|
+INTR_X86_AVX_PTESTNZC_256 = 496
|
|
+INTR_X86_AVX_PTESTZ_256 = 497
|
|
+INTR_X86_AVX_RCP_PS_256 = 498
|
|
+INTR_X86_AVX_ROUND_PD_256 = 499
|
|
+INTR_X86_AVX_ROUND_PS_256 = 500
|
|
+INTR_X86_AVX_RSQRT_PS_256 = 501
|
|
+INTR_X86_AVX_SQRT_PD_256 = 502
|
|
+INTR_X86_AVX_SQRT_PS_256 = 503
|
|
+INTR_X86_AVX_STOREU_DQ_256 = 504
|
|
+INTR_X86_AVX_STOREU_PD_256 = 505
|
|
+INTR_X86_AVX_STOREU_PS_256 = 506
|
|
+INTR_X86_AVX_VBROADCAST_SD_256 = 507
|
|
+INTR_X86_AVX_VBROADCASTF128_PD_256 = 508
|
|
+INTR_X86_AVX_VBROADCASTF128_PS_256 = 509
|
|
+INTR_X86_AVX_VBROADCASTSS = 510
|
|
+INTR_X86_AVX_VBROADCASTSS_256 = 511
|
|
+INTR_X86_AVX_VEXTRACTF128_PD_256 = 512
|
|
+INTR_X86_AVX_VEXTRACTF128_PS_256 = 513
|
|
+INTR_X86_AVX_VEXTRACTF128_SI_256 = 514
|
|
+INTR_X86_AVX_VINSERTF128_PD_256 = 515
|
|
+INTR_X86_AVX_VINSERTF128_PS_256 = 516
|
|
+INTR_X86_AVX_VINSERTF128_SI_256 = 517
|
|
+INTR_X86_AVX_VPERM2F128_PD_256 = 518
|
|
+INTR_X86_AVX_VPERM2F128_PS_256 = 519
|
|
+INTR_X86_AVX_VPERM2F128_SI_256 = 520
|
|
+INTR_X86_AVX_VPERMIL_PD = 521
|
|
+INTR_X86_AVX_VPERMIL_PD_256 = 522
|
|
+INTR_X86_AVX_VPERMIL_PS = 523
|
|
+INTR_X86_AVX_VPERMIL_PS_256 = 524
|
|
+INTR_X86_AVX_VPERMILVAR_PD = 525
|
|
+INTR_X86_AVX_VPERMILVAR_PD_256 = 526
|
|
+INTR_X86_AVX_VPERMILVAR_PS = 527
|
|
+INTR_X86_AVX_VPERMILVAR_PS_256 = 528
|
|
+INTR_X86_AVX_VTESTC_PD = 529
|
|
+INTR_X86_AVX_VTESTC_PD_256 = 530
|
|
+INTR_X86_AVX_VTESTC_PS = 531
|
|
+INTR_X86_AVX_VTESTC_PS_256 = 532
|
|
+INTR_X86_AVX_VTESTNZC_PD = 533
|
|
+INTR_X86_AVX_VTESTNZC_PD_256 = 534
|
|
+INTR_X86_AVX_VTESTNZC_PS = 535
|
|
+INTR_X86_AVX_VTESTNZC_PS_256 = 536
|
|
+INTR_X86_AVX_VTESTZ_PD = 537
|
|
+INTR_X86_AVX_VTESTZ_PD_256 = 538
|
|
+INTR_X86_AVX_VTESTZ_PS = 539
|
|
+INTR_X86_AVX_VTESTZ_PS_256 = 540
|
|
+INTR_X86_AVX_VZEROALL = 541
|
|
+INTR_X86_AVX_VZEROUPPER = 542
|
|
+INTR_X86_INT = 543
|
|
+INTR_X86_MMX_EMMS = 544
|
|
+INTR_X86_MMX_FEMMS = 545
|
|
+INTR_X86_MMX_MASKMOVQ = 546
|
|
+INTR_X86_MMX_MOVNT_DQ = 547
|
|
+INTR_X86_MMX_PACKSSDW = 548
|
|
+INTR_X86_MMX_PACKSSWB = 549
|
|
+INTR_X86_MMX_PACKUSWB = 550
|
|
+INTR_X86_MMX_PADD_B = 551
|
|
+INTR_X86_MMX_PADD_D = 552
|
|
+INTR_X86_MMX_PADD_Q = 553
|
|
+INTR_X86_MMX_PADD_W = 554
|
|
+INTR_X86_MMX_PADDS_B = 555
|
|
+INTR_X86_MMX_PADDS_W = 556
|
|
+INTR_X86_MMX_PADDUS_B = 557
|
|
+INTR_X86_MMX_PADDUS_W = 558
|
|
+INTR_X86_MMX_PALIGNR_B = 559
|
|
+INTR_X86_MMX_PAND = 560
|
|
+INTR_X86_MMX_PANDN = 561
|
|
+INTR_X86_MMX_PAVG_B = 562
|
|
+INTR_X86_MMX_PAVG_W = 563
|
|
+INTR_X86_MMX_PCMPEQ_B = 564
|
|
+INTR_X86_MMX_PCMPEQ_D = 565
|
|
+INTR_X86_MMX_PCMPEQ_W = 566
|
|
+INTR_X86_MMX_PCMPGT_B = 567
|
|
+INTR_X86_MMX_PCMPGT_D = 568
|
|
+INTR_X86_MMX_PCMPGT_W = 569
|
|
+INTR_X86_MMX_PEXTR_W = 570
|
|
+INTR_X86_MMX_PINSR_W = 571
|
|
+INTR_X86_MMX_PMADD_WD = 572
|
|
+INTR_X86_MMX_PMAXS_W = 573
|
|
+INTR_X86_MMX_PMAXU_B = 574
|
|
+INTR_X86_MMX_PMINS_W = 575
|
|
+INTR_X86_MMX_PMINU_B = 576
|
|
+INTR_X86_MMX_PMOVMSKB = 577
|
|
+INTR_X86_MMX_PMULH_W = 578
|
|
+INTR_X86_MMX_PMULHU_W = 579
|
|
+INTR_X86_MMX_PMULL_W = 580
|
|
+INTR_X86_MMX_PMULU_DQ = 581
|
|
+INTR_X86_MMX_POR = 582
|
|
+INTR_X86_MMX_PSAD_BW = 583
|
|
+INTR_X86_MMX_PSLL_D = 584
|
|
+INTR_X86_MMX_PSLL_Q = 585
|
|
+INTR_X86_MMX_PSLL_W = 586
|
|
+INTR_X86_MMX_PSLLI_D = 587
|
|
+INTR_X86_MMX_PSLLI_Q = 588
|
|
+INTR_X86_MMX_PSLLI_W = 589
|
|
+INTR_X86_MMX_PSRA_D = 590
|
|
+INTR_X86_MMX_PSRA_W = 591
|
|
+INTR_X86_MMX_PSRAI_D = 592
|
|
+INTR_X86_MMX_PSRAI_W = 593
|
|
+INTR_X86_MMX_PSRL_D = 594
|
|
+INTR_X86_MMX_PSRL_Q = 595
|
|
+INTR_X86_MMX_PSRL_W = 596
|
|
+INTR_X86_MMX_PSRLI_D = 597
|
|
+INTR_X86_MMX_PSRLI_Q = 598
|
|
+INTR_X86_MMX_PSRLI_W = 599
|
|
+INTR_X86_MMX_PSUB_B = 600
|
|
+INTR_X86_MMX_PSUB_D = 601
|
|
+INTR_X86_MMX_PSUB_Q = 602
|
|
+INTR_X86_MMX_PSUB_W = 603
|
|
+INTR_X86_MMX_PSUBS_B = 604
|
|
+INTR_X86_MMX_PSUBS_W = 605
|
|
+INTR_X86_MMX_PSUBUS_B = 606
|
|
+INTR_X86_MMX_PSUBUS_W = 607
|
|
+INTR_X86_MMX_PUNPCKHBW = 608
|
|
+INTR_X86_MMX_PUNPCKHDQ = 609
|
|
+INTR_X86_MMX_PUNPCKHWD = 610
|
|
+INTR_X86_MMX_PUNPCKLBW = 611
|
|
+INTR_X86_MMX_PUNPCKLDQ = 612
|
|
+INTR_X86_MMX_PUNPCKLWD = 613
|
|
+INTR_X86_MMX_PXOR = 614
|
|
+INTR_X86_SSE2_ADD_SD = 615
|
|
+INTR_X86_SSE2_CLFLUSH = 616
|
|
+INTR_X86_SSE2_CMP_PD = 617
|
|
+INTR_X86_SSE2_CMP_SD = 618
|
|
+INTR_X86_SSE2_COMIEQ_SD = 619
|
|
+INTR_X86_SSE2_COMIGE_SD = 620
|
|
+INTR_X86_SSE2_COMIGT_SD = 621
|
|
+INTR_X86_SSE2_COMILE_SD = 622
|
|
+INTR_X86_SSE2_COMILT_SD = 623
|
|
+INTR_X86_SSE2_COMINEQ_SD = 624
|
|
+INTR_X86_SSE2_CVTDQ2PD = 625
|
|
+INTR_X86_SSE2_CVTDQ2PS = 626
|
|
+INTR_X86_SSE2_CVTPD2DQ = 627
|
|
+INTR_X86_SSE2_CVTPD2PS = 628
|
|
+INTR_X86_SSE2_CVTPS2DQ = 629
|
|
+INTR_X86_SSE2_CVTPS2PD = 630
|
|
+INTR_X86_SSE2_CVTSD2SI = 631
|
|
+INTR_X86_SSE2_CVTSD2SI64 = 632
|
|
+INTR_X86_SSE2_CVTSD2SS = 633
|
|
+INTR_X86_SSE2_CVTSI2SD = 634
|
|
+INTR_X86_SSE2_CVTSI642SD = 635
|
|
+INTR_X86_SSE2_CVTSS2SD = 636
|
|
+INTR_X86_SSE2_CVTTPD2DQ = 637
|
|
+INTR_X86_SSE2_CVTTPS2DQ = 638
|
|
+INTR_X86_SSE2_CVTTSD2SI = 639
|
|
+INTR_X86_SSE2_CVTTSD2SI64 = 640
|
|
+INTR_X86_SSE2_DIV_SD = 641
|
|
+INTR_X86_SSE2_LFENCE = 642
|
|
+INTR_X86_SSE2_LOADU_DQ = 643
|
|
+INTR_X86_SSE2_LOADU_PD = 644
|
|
+INTR_X86_SSE2_MASKMOV_DQU = 645
|
|
+INTR_X86_SSE2_MAX_PD = 646
|
|
+INTR_X86_SSE2_MAX_SD = 647
|
|
+INTR_X86_SSE2_MFENCE = 648
|
|
+INTR_X86_SSE2_MIN_PD = 649
|
|
+INTR_X86_SSE2_MIN_SD = 650
|
|
+INTR_X86_SSE2_MOVMSK_PD = 651
|
|
+INTR_X86_SSE2_MOVNT_DQ = 652
|
|
+INTR_X86_SSE2_MOVNT_I = 653
|
|
+INTR_X86_SSE2_MOVNT_PD = 654
|
|
+INTR_X86_SSE2_MUL_SD = 655
|
|
+INTR_X86_SSE2_PACKSSDW_128 = 656
|
|
+INTR_X86_SSE2_PACKSSWB_128 = 657
|
|
+INTR_X86_SSE2_PACKUSWB_128 = 658
|
|
+INTR_X86_SSE2_PADDS_B = 659
|
|
+INTR_X86_SSE2_PADDS_W = 660
|
|
+INTR_X86_SSE2_PADDUS_B = 661
|
|
+INTR_X86_SSE2_PADDUS_W = 662
|
|
+INTR_X86_SSE2_PAVG_B = 663
|
|
+INTR_X86_SSE2_PAVG_W = 664
|
|
+INTR_X86_SSE2_PCMPEQ_B = 665
|
|
+INTR_X86_SSE2_PCMPEQ_D = 666
|
|
+INTR_X86_SSE2_PCMPEQ_W = 667
|
|
+INTR_X86_SSE2_PCMPGT_B = 668
|
|
+INTR_X86_SSE2_PCMPGT_D = 669
|
|
+INTR_X86_SSE2_PCMPGT_W = 670
|
|
+INTR_X86_SSE2_PMADD_WD = 671
|
|
+INTR_X86_SSE2_PMAXS_W = 672
|
|
+INTR_X86_SSE2_PMAXU_B = 673
|
|
+INTR_X86_SSE2_PMINS_W = 674
|
|
+INTR_X86_SSE2_PMINU_B = 675
|
|
+INTR_X86_SSE2_PMOVMSKB_128 = 676
|
|
+INTR_X86_SSE2_PMULH_W = 677
|
|
+INTR_X86_SSE2_PMULHU_W = 678
|
|
+INTR_X86_SSE2_PMULU_DQ = 679
|
|
+INTR_X86_SSE2_PSAD_BW = 680
|
|
+INTR_X86_SSE2_PSLL_D = 681
|
|
+INTR_X86_SSE2_PSLL_DQ = 682
|
|
+INTR_X86_SSE2_PSLL_DQ_BS = 683
|
|
+INTR_X86_SSE2_PSLL_Q = 684
|
|
+INTR_X86_SSE2_PSLL_W = 685
|
|
+INTR_X86_SSE2_PSLLI_D = 686
|
|
+INTR_X86_SSE2_PSLLI_Q = 687
|
|
+INTR_X86_SSE2_PSLLI_W = 688
|
|
+INTR_X86_SSE2_PSRA_D = 689
|
|
+INTR_X86_SSE2_PSRA_W = 690
|
|
+INTR_X86_SSE2_PSRAI_D = 691
|
|
+INTR_X86_SSE2_PSRAI_W = 692
|
|
+INTR_X86_SSE2_PSRL_D = 693
|
|
+INTR_X86_SSE2_PSRL_DQ = 694
|
|
+INTR_X86_SSE2_PSRL_DQ_BS = 695
|
|
+INTR_X86_SSE2_PSRL_Q = 696
|
|
+INTR_X86_SSE2_PSRL_W = 697
|
|
+INTR_X86_SSE2_PSRLI_D = 698
|
|
+INTR_X86_SSE2_PSRLI_Q = 699
|
|
+INTR_X86_SSE2_PSRLI_W = 700
|
|
+INTR_X86_SSE2_PSUBS_B = 701
|
|
+INTR_X86_SSE2_PSUBS_W = 702
|
|
+INTR_X86_SSE2_PSUBUS_B = 703
|
|
+INTR_X86_SSE2_PSUBUS_W = 704
|
|
+INTR_X86_SSE2_SQRT_PD = 705
|
|
+INTR_X86_SSE2_SQRT_SD = 706
|
|
+INTR_X86_SSE2_STOREL_DQ = 707
|
|
+INTR_X86_SSE2_STOREU_DQ = 708
|
|
+INTR_X86_SSE2_STOREU_PD = 709
|
|
+INTR_X86_SSE2_SUB_SD = 710
|
|
+INTR_X86_SSE2_UCOMIEQ_SD = 711
|
|
+INTR_X86_SSE2_UCOMIGE_SD = 712
|
|
+INTR_X86_SSE2_UCOMIGT_SD = 713
|
|
+INTR_X86_SSE2_UCOMILE_SD = 714
|
|
+INTR_X86_SSE2_UCOMILT_SD = 715
|
|
+INTR_X86_SSE2_UCOMINEQ_SD = 716
|
|
+INTR_X86_SSE3_ADDSUB_PD = 717
|
|
+INTR_X86_SSE3_ADDSUB_PS = 718
|
|
+INTR_X86_SSE3_HADD_PD = 719
|
|
+INTR_X86_SSE3_HADD_PS = 720
|
|
+INTR_X86_SSE3_HSUB_PD = 721
|
|
+INTR_X86_SSE3_HSUB_PS = 722
|
|
+INTR_X86_SSE3_LDU_DQ = 723
|
|
+INTR_X86_SSE3_MONITOR = 724
|
|
+INTR_X86_SSE3_MWAIT = 725
|
|
+INTR_X86_SSE41_BLENDPD = 726
|
|
+INTR_X86_SSE41_BLENDPS = 727
|
|
+INTR_X86_SSE41_BLENDVPD = 728
|
|
+INTR_X86_SSE41_BLENDVPS = 729
|
|
+INTR_X86_SSE41_DPPD = 730
|
|
+INTR_X86_SSE41_DPPS = 731
|
|
+INTR_X86_SSE41_EXTRACTPS = 732
|
|
+INTR_X86_SSE41_INSERTPS = 733
|
|
+INTR_X86_SSE41_MOVNTDQA = 734
|
|
+INTR_X86_SSE41_MPSADBW = 735
|
|
+INTR_X86_SSE41_PACKUSDW = 736
|
|
+INTR_X86_SSE41_PBLENDVB = 737
|
|
+INTR_X86_SSE41_PBLENDW = 738
|
|
+INTR_X86_SSE41_PCMPEQQ = 739
|
|
+INTR_X86_SSE41_PEXTRB = 740
|
|
+INTR_X86_SSE41_PEXTRD = 741
|
|
+INTR_X86_SSE41_PEXTRQ = 742
|
|
+INTR_X86_SSE41_PHMINPOSUW = 743
|
|
+INTR_X86_SSE41_PMAXSB = 744
|
|
+INTR_X86_SSE41_PMAXSD = 745
|
|
+INTR_X86_SSE41_PMAXUD = 746
|
|
+INTR_X86_SSE41_PMAXUW = 747
|
|
+INTR_X86_SSE41_PMINSB = 748
|
|
+INTR_X86_SSE41_PMINSD = 749
|
|
+INTR_X86_SSE41_PMINUD = 750
|
|
+INTR_X86_SSE41_PMINUW = 751
|
|
+INTR_X86_SSE41_PMOVSXBD = 752
|
|
+INTR_X86_SSE41_PMOVSXBQ = 753
|
|
+INTR_X86_SSE41_PMOVSXBW = 754
|
|
+INTR_X86_SSE41_PMOVSXDQ = 755
|
|
+INTR_X86_SSE41_PMOVSXWD = 756
|
|
+INTR_X86_SSE41_PMOVSXWQ = 757
|
|
+INTR_X86_SSE41_PMOVZXBD = 758
|
|
+INTR_X86_SSE41_PMOVZXBQ = 759
|
|
+INTR_X86_SSE41_PMOVZXBW = 760
|
|
+INTR_X86_SSE41_PMOVZXDQ = 761
|
|
+INTR_X86_SSE41_PMOVZXWD = 762
|
|
+INTR_X86_SSE41_PMOVZXWQ = 763
|
|
+INTR_X86_SSE41_PMULDQ = 764
|
|
+INTR_X86_SSE41_PTESTC = 765
|
|
+INTR_X86_SSE41_PTESTNZC = 766
|
|
+INTR_X86_SSE41_PTESTZ = 767
|
|
+INTR_X86_SSE41_ROUND_PD = 768
|
|
+INTR_X86_SSE41_ROUND_PS = 769
|
|
+INTR_X86_SSE41_ROUND_SD = 770
|
|
+INTR_X86_SSE41_ROUND_SS = 771
|
|
+INTR_X86_SSE42_CRC32_16 = 772
|
|
+INTR_X86_SSE42_CRC32_32 = 773
|
|
+INTR_X86_SSE42_CRC32_8 = 774
|
|
+INTR_X86_SSE42_CRC64_64 = 775
|
|
+INTR_X86_SSE42_CRC64_8 = 776
|
|
+INTR_X86_SSE42_PCMPESTRI128 = 777
|
|
+INTR_X86_SSE42_PCMPESTRIA128 = 778
|
|
+INTR_X86_SSE42_PCMPESTRIC128 = 779
|
|
+INTR_X86_SSE42_PCMPESTRIO128 = 780
|
|
+INTR_X86_SSE42_PCMPESTRIS128 = 781
|
|
+INTR_X86_SSE42_PCMPESTRIZ128 = 782
|
|
+INTR_X86_SSE42_PCMPESTRM128 = 783
|
|
+INTR_X86_SSE42_PCMPGTQ = 784
|
|
+INTR_X86_SSE42_PCMPISTRI128 = 785
|
|
+INTR_X86_SSE42_PCMPISTRIA128 = 786
|
|
+INTR_X86_SSE42_PCMPISTRIC128 = 787
|
|
+INTR_X86_SSE42_PCMPISTRIO128 = 788
|
|
+INTR_X86_SSE42_PCMPISTRIS128 = 789
|
|
+INTR_X86_SSE42_PCMPISTRIZ128 = 790
|
|
+INTR_X86_SSE42_PCMPISTRM128 = 791
|
|
+INTR_X86_SSE_ADD_SS = 792
|
|
+INTR_X86_SSE_CMP_PS = 793
|
|
+INTR_X86_SSE_CMP_SS = 794
|
|
+INTR_X86_SSE_COMIEQ_SS = 795
|
|
+INTR_X86_SSE_COMIGE_SS = 796
|
|
+INTR_X86_SSE_COMIGT_SS = 797
|
|
+INTR_X86_SSE_COMILE_SS = 798
|
|
+INTR_X86_SSE_COMILT_SS = 799
|
|
+INTR_X86_SSE_COMINEQ_SS = 800
|
|
+INTR_X86_SSE_CVTPD2PI = 801
|
|
+INTR_X86_SSE_CVTPI2PD = 802
|
|
+INTR_X86_SSE_CVTPI2PS = 803
|
|
+INTR_X86_SSE_CVTPS2PI = 804
|
|
+INTR_X86_SSE_CVTSI2SS = 805
|
|
+INTR_X86_SSE_CVTSI642SS = 806
|
|
+INTR_X86_SSE_CVTSS2SI = 807
|
|
+INTR_X86_SSE_CVTSS2SI64 = 808
|
|
+INTR_X86_SSE_CVTTPD2PI = 809
|
|
+INTR_X86_SSE_CVTTPS2PI = 810
|
|
+INTR_X86_SSE_CVTTSS2SI = 811
|
|
+INTR_X86_SSE_CVTTSS2SI64 = 812
|
|
+INTR_X86_SSE_DIV_SS = 813
|
|
+INTR_X86_SSE_LDMXCSR = 814
|
|
+INTR_X86_SSE_LOADU_PS = 815
|
|
+INTR_X86_SSE_MAX_PS = 816
|
|
+INTR_X86_SSE_MAX_SS = 817
|
|
+INTR_X86_SSE_MIN_PS = 818
|
|
+INTR_X86_SSE_MIN_SS = 819
|
|
+INTR_X86_SSE_MOVMSK_PS = 820
|
|
+INTR_X86_SSE_MOVNT_PS = 821
|
|
+INTR_X86_SSE_MUL_SS = 822
|
|
+INTR_X86_SSE_PSHUF_W = 823
|
|
+INTR_X86_SSE_RCP_PS = 824
|
|
+INTR_X86_SSE_RCP_SS = 825
|
|
+INTR_X86_SSE_RSQRT_PS = 826
|
|
+INTR_X86_SSE_RSQRT_SS = 827
|
|
+INTR_X86_SSE_SFENCE = 828
|
|
+INTR_X86_SSE_SQRT_PS = 829
|
|
+INTR_X86_SSE_SQRT_SS = 830
|
|
+INTR_X86_SSE_STMXCSR = 831
|
|
+INTR_X86_SSE_STOREU_PS = 832
|
|
+INTR_X86_SSE_SUB_SS = 833
|
|
+INTR_X86_SSE_UCOMIEQ_SS = 834
|
|
+INTR_X86_SSE_UCOMIGE_SS = 835
|
|
+INTR_X86_SSE_UCOMIGT_SS = 836
|
|
+INTR_X86_SSE_UCOMILE_SS = 837
|
|
+INTR_X86_SSE_UCOMILT_SS = 838
|
|
+INTR_X86_SSE_UCOMINEQ_SS = 839
|
|
+INTR_X86_SSSE3_PABS_B = 840
|
|
+INTR_X86_SSSE3_PABS_B_128 = 841
|
|
+INTR_X86_SSSE3_PABS_D = 842
|
|
+INTR_X86_SSSE3_PABS_D_128 = 843
|
|
+INTR_X86_SSSE3_PABS_W = 844
|
|
+INTR_X86_SSSE3_PABS_W_128 = 845
|
|
+INTR_X86_SSSE3_PHADD_D = 846
|
|
+INTR_X86_SSSE3_PHADD_D_128 = 847
|
|
+INTR_X86_SSSE3_PHADD_SW = 848
|
|
+INTR_X86_SSSE3_PHADD_SW_128 = 849
|
|
+INTR_X86_SSSE3_PHADD_W = 850
|
|
+INTR_X86_SSSE3_PHADD_W_128 = 851
|
|
+INTR_X86_SSSE3_PHSUB_D = 852
|
|
+INTR_X86_SSSE3_PHSUB_D_128 = 853
|
|
+INTR_X86_SSSE3_PHSUB_SW = 854
|
|
+INTR_X86_SSSE3_PHSUB_SW_128 = 855
|
|
+INTR_X86_SSSE3_PHSUB_W = 856
|
|
+INTR_X86_SSSE3_PHSUB_W_128 = 857
|
|
+INTR_X86_SSSE3_PMADD_UB_SW = 858
|
|
+INTR_X86_SSSE3_PMADD_UB_SW_128 = 859
|
|
+INTR_X86_SSSE3_PMUL_HR_SW = 860
|
|
+INTR_X86_SSSE3_PMUL_HR_SW_128 = 861
|
|
+INTR_X86_SSSE3_PSHUF_B = 862
|
|
+INTR_X86_SSSE3_PSHUF_B_128 = 863
|
|
+INTR_X86_SSSE3_PSIGN_B = 864
|
|
+INTR_X86_SSSE3_PSIGN_B_128 = 865
|
|
+INTR_X86_SSSE3_PSIGN_D = 866
|
|
+INTR_X86_SSSE3_PSIGN_D_128 = 867
|
|
+INTR_X86_SSSE3_PSIGN_W = 868
|
|
+INTR_X86_SSSE3_PSIGN_W_128 = 869
|
|
+INTR_XCORE_BITREV = 870
|
|
+INTR_XCORE_CHKCT = 871
|
|
+INTR_XCORE_CLRE = 872
|
|
+INTR_XCORE_EEU = 873
|
|
+INTR_XCORE_FREER = 874
|
|
+INTR_XCORE_GETID = 875
|
|
+INTR_XCORE_GETR = 876
|
|
+INTR_XCORE_GETTS = 877
|
|
+INTR_XCORE_IN = 878
|
|
+INTR_XCORE_INCT = 879
|
|
+INTR_XCORE_INSHR = 880
|
|
+INTR_XCORE_INT = 881
|
|
+INTR_XCORE_OUT = 882
|
|
+INTR_XCORE_OUTCT = 883
|
|
+INTR_XCORE_OUTSHR = 884
|
|
+INTR_XCORE_OUTT = 885
|
|
+INTR_XCORE_SETC = 886
|
|
+INTR_XCORE_SETD = 887
|
|
+INTR_XCORE_SETPT = 888
|
|
+INTR_XCORE_SETTW = 889
|
|
+INTR_XCORE_SETV = 890
|
|
+INTR_XCORE_SYNCR = 891
|
|
+INTR_XCORE_WAITEVENT = 892
|
|
Index: _core.c
|
|
===================================================================
|
|
--- _core.c (revision 105)
|
|
+++ _core.c (working copy)
|
|
@@ -807,7 +807,7 @@
|
|
_wrap_pass( EdgeProfiler )
|
|
_wrap_pass( FunctionAttrs )
|
|
_wrap_pass( FunctionInlining )
|
|
-_wrap_pass( GEPSplitter )
|
|
+//_wrap_pass( GEPSplitter )
|
|
_wrap_pass( GlobalDCE )
|
|
_wrap_pass( GlobalOptimizer )
|
|
_wrap_pass( GlobalsModRef )
|
|
@@ -822,11 +822,11 @@
|
|
_wrap_pass( LazyValueInfo )
|
|
_wrap_pass( LCSSA )
|
|
_wrap_pass( LICM )
|
|
-_wrap_pass( LiveValues )
|
|
+//_wrap_pass( LiveValues )
|
|
_wrap_pass( LoopDeletion )
|
|
_wrap_pass( LoopDependenceAnalysis )
|
|
_wrap_pass( LoopExtractor )
|
|
-_wrap_pass( LoopIndexSplit )
|
|
+//_wrap_pass( LoopIndexSplit )
|
|
_wrap_pass( LoopRotate )
|
|
_wrap_pass( LoopSimplify )
|
|
_wrap_pass( LoopStrengthReduce )
|
|
@@ -841,7 +841,7 @@
|
|
_wrap_pass( NoProfileInfo )
|
|
_wrap_pass( OptimalEdgeProfiler )
|
|
_wrap_pass( PartialInlining )
|
|
-_wrap_pass( PartialSpecialization )
|
|
+//_wrap_pass( PartialSpecialization )
|
|
_wrap_pass( PostDomOnlyPrinter )
|
|
_wrap_pass( PostDomOnlyViewer )
|
|
_wrap_pass( PostDomPrinter )
|
|
@@ -855,7 +855,7 @@
|
|
_wrap_pass( ScalarEvolutionAliasAnalysis )
|
|
_wrap_pass( ScalarReplAggregates )
|
|
_wrap_pass( SCCP )
|
|
-_wrap_pass( SimplifyHalfPowrLibCalls )
|
|
+//_wrap_pass( SimplifyHalfPowrLibCalls )
|
|
_wrap_pass( SimplifyLibCalls )
|
|
_wrap_pass( SingleLoopExtractor )
|
|
_wrap_pass( StripDeadPrototypes )
|
|
@@ -1162,7 +1162,7 @@
|
|
Py_RETURN_NONE;
|
|
}
|
|
|
|
-_wrap_obj2obj(LLVMInlineFunction, LLVMValueRef, int)
|
|
+//_wrap_obj2obj(LLVMInlineFunction, LLVMValueRef, int)
|
|
|
|
/* Expose the void* inside a PyCObject as a PyLong. This allows us to
|
|
* use it as a unique ID. */
|
|
@@ -1569,7 +1569,7 @@
|
|
_pass( EdgeProfiler )
|
|
_pass( FunctionAttrs )
|
|
_pass( FunctionInlining )
|
|
- _pass( GEPSplitter )
|
|
+ //_pass( GEPSplitter )
|
|
_pass( GlobalDCE )
|
|
_pass( GlobalOptimizer )
|
|
_pass( GlobalsModRef )
|
|
@@ -1584,11 +1584,11 @@
|
|
_pass( LazyValueInfo )
|
|
_pass( LCSSA )
|
|
_pass( LICM )
|
|
- _pass( LiveValues )
|
|
+ //_pass( LiveValues )
|
|
_pass( LoopDeletion )
|
|
_pass( LoopDependenceAnalysis )
|
|
_pass( LoopExtractor )
|
|
- _pass( LoopIndexSplit )
|
|
+ //_pass( LoopIndexSplit )
|
|
_pass( LoopRotate )
|
|
_pass( LoopSimplify )
|
|
_pass( LoopStrengthReduce )
|
|
@@ -1603,7 +1603,7 @@
|
|
_pass( NoProfileInfo )
|
|
_pass( OptimalEdgeProfiler )
|
|
_pass( PartialInlining )
|
|
- _pass( PartialSpecialization )
|
|
+ //_pass( PartialSpecialization )
|
|
_pass( PostDomOnlyPrinter )
|
|
_pass( PostDomOnlyViewer )
|
|
_pass( PostDomPrinter )
|
|
@@ -1617,7 +1617,7 @@
|
|
_pass( ScalarEvolutionAliasAnalysis )
|
|
_pass( ScalarReplAggregates )
|
|
_pass( SCCP )
|
|
- _pass( SimplifyHalfPowrLibCalls )
|
|
+ //_pass( SimplifyHalfPowrLibCalls )
|
|
_pass( SimplifyLibCalls )
|
|
_pass( SingleLoopExtractor )
|
|
_pass( StripDeadPrototypes )
|
|
@@ -1672,7 +1672,7 @@
|
|
/* Misc */
|
|
_method( LLVMGetIntrinsic )
|
|
_method( LLVMLoadLibraryPermanently )
|
|
- _method( LLVMInlineFunction )
|
|
+ //_method( LLVMInlineFunction )
|
|
_method( PyCObjectVoidPtrToPyLong )
|
|
|
|
{ NULL }
|
|
Index: extra.h
|
|
===================================================================
|
|
--- extra.h (revision 105)
|
|
+++ extra.h (working copy)
|
|
@@ -181,7 +181,7 @@
|
|
/* Wraps llvm::InlineFunction(). Inlines a function. C is the call
|
|
* instruction, created by LLVMBuildCall. Even if it fails, the Function
|
|
* containing the call is still in a proper state (not changed). */
|
|
-int LLVMInlineFunction(LLVMValueRef call);
|
|
+//int LLVMInlineFunction(LLVMValueRef call);
|
|
|
|
/* Wraps llvm::getAlignmentFromAttrs from Attributes.h. Compliments the
|
|
* already available LLVMSetParamAlignment(). */
|
|
@@ -209,13 +209,13 @@
|
|
declare_pass( DomPrinter )
|
|
declare_pass( DomViewer )
|
|
declare_pass( EdgeProfiler )
|
|
-declare_pass( GEPSplitter )
|
|
+//declare_pass( GEPSplitter )
|
|
declare_pass( GlobalsModRef )
|
|
declare_pass( InstCount )
|
|
declare_pass( InstructionNamer )
|
|
declare_pass( LazyValueInfo )
|
|
declare_pass( LCSSA )
|
|
-declare_pass( LiveValues )
|
|
+//declare_pass( LiveValues )
|
|
declare_pass( LoopDependenceAnalysis )
|
|
declare_pass( LoopExtractor )
|
|
declare_pass( LoopSimplify )
|
|
@@ -227,7 +227,7 @@
|
|
declare_pass( NoProfileInfo )
|
|
declare_pass( OptimalEdgeProfiler )
|
|
declare_pass( PartialInlining )
|
|
-declare_pass( PartialSpecialization )
|
|
+//declare_pass( PartialSpecialization )
|
|
declare_pass( PostDomOnlyPrinter )
|
|
declare_pass( PostDomOnlyViewer )
|
|
declare_pass( PostDomPrinter )
|