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add or1k (OpenRISC 1000) architecture port

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With the exception of a fenv implementation, the port is fully featured.
The port has been tested in or1ksim, the golden reference functional
simulator for OpenRISC 1000.
It passes all libc-test tests (except the math tests that
requires a fenv implementation).

The port assumes an or1k implementation that has support for
atomic instructions (l.lwa/l.swa).

Although it passes all the libc-test tests, the port is still
in an experimental state, and has yet experienced very little
'real-world' use.
This commit is contained in:
Stefan Kristiansson 2014-07-17 22:09:10 +03:00 • committed by Rich Felker
commit 200d15479c
46 changed files with 1982 additions and 1 deletions
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configure vendored
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@ -250,6 +250,7 @@ x86_64-x32*|x32*|x86_64*x32) ARCH=x32 ;;
x86_64*) ARCH=x86_64 ;;
mips*) ARCH=mips ;;
microblaze*) ARCH=microblaze ;;
or1k*) ARCH=or1k ;;
powerpc*) ARCH=powerpc ;;
sh[1-9bel-]*|sh|superh*) ARCH=sh ;;
unknown) fail "$0: unable to detect target arch; try $0 --target=..." ;;