initial commit of the arm port

this port assumes eabi calling conventions, eabi linux syscall
convention, and presence of the kernel helpers at 0xffff0f?0 needed
for threads support. otherwise it makes very few assumptions, and the
code should work even on armv4 without thumb support, as well as on
systems with thumb interworking. the bits headers declare this a
little endian system, but as far as i can tell the code should work
equally well on big endian.

some small details are probably broken; so far, testing has been
limited to qemu/aboriginal linux.

src/thread/arm/__set_thread_area.s

@@ -0,0 +1,12 @@
+.text
+.global __set_thread_area
+.type   __set_thread_area,%function
+__set_thread_area:
+	mov r1,r7
+	mov r7,#0x0f0000
+	add r7,r7,#5
+	svc 0
+	mov r7,r1
+	tst lr,#1
+	moveq pc,lr
+	bx lr

src/thread/arm/__unmapself.s

@@ -0,0 +1,8 @@
+.text
+.global __unmapself
+.type   __unmapself,%function
+__unmapself:
+	mov r7,#91
+	svc 0
+	mov r7,#1
+	svc 0

src/thread/arm/clone.s

@@ -0,0 +1,35 @@
+.text
+.global __clone
+.weak clone
+.type   __clone,%function
+.type   clone,%function
+__clone:
+clone:
+	stmfd sp!,{r4,r5,r6,r7}
+	mov r7,#120
+	mov r6,r3
+	mov r5,r0
+	mov r0,r2
+	and r1,r1,#-16
+	ldr r2,[sp,#16]
+	ldr r3,[sp,#20]
+	ldr r4,[sp,#24]
+	svc 0
+	tst r0,r0
+	beq 1f
+	ldmfd sp!,{r4,r5,r6,r7}
+	tst lr,#1
+	moveq pc,lr
+	bx lr
+
+1:	mov r0,r6
+	tst r5,#1
+	bne 1f
+	mov lr,pc
+	mov pc,r5
+2:	mov r1,r0
+	mov r0,#1
+	svc
+
+1:	blx r5
+	b 2b

src/thread/arm/syscall_cp.s

@@ -0,0 +1,23 @@
+.global __syscall_cp_asm
+.type __syscall_cp_asm,%function
+__syscall_cp_asm:
+	mov ip,sp
+	stmfd sp!,{r4,r5,r6,r7,lr}
+	stmfd sp!,{r0}
+	bl 1f
+1:	mov r4,#(1f-.)
+	add r4,r4,lr
+	str r4,[r0,#4]
+	str sp,[r0]
+	mov r7,r1
+	mov r0,r2
+	mov r1,r3
+	ldmfd ip,{r2,r3,r4,r5,r6}
+1:	svc 0
+	ldmfd sp!,{r1}
+	mov r2,#0
+	str r2,[r1]
+	ldmfd sp!,{r4,r5,r6,r7,lr}
+	tst lr,#1
+	moveq pc,lr
+	bx lr