added Target.createMCSubtargetInfo and createMCDisassembler

also added bindings to classes required by the target methods. also
added a convenience function to initialize all target components to
the llvm module
This commit is contained in:
anthony cantor 2013-08-13 15:14:16 -06:00 • committed by Siu Kwan Lam
commit ba03b226c8
5 changed files with 62 additions and 0 deletions

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@ -4,6 +4,8 @@ del get_versions
from llvmpy import extra from llvmpy import extra
from llvmpy import api
version = extra.get_llvm_version() version = extra.get_llvm_version()
del extra del extra
@ -42,3 +44,12 @@ def test(verbosity=1):
return len(result.failures) + len(result.errors) return len(result.failures) + len(result.errors)
def initialize_all_target_components():
api.llvm.InitializeAllTargets()
api.llvm.InitializeAllTargetInfos()
api.llvm.InitializeAllTargetMCs()
api.llvm.InitializeAllAsmPrinters()
api.llvm.InitializeAllDisassemblers()
api.llvm.InitializeAllAsmParsers()

26
llvm/mc/__init__.py Normal file
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@ -0,0 +1,26 @@
from io import BytesIO
import contextlib
import llvm
from llvmpy import api
class Disassembler(llvm.Wrapper):
@staticmethod
def new(triple='', cpu='', features=''):
if not triple:
triple = api.llvm.sys.getDefaultTargetTriple()
with contextlib.closing(BytesIO()) as error:
target = api.llvm.TargetRegistry.lookupTarget(triple, error)
if not target:
raise llvm.LLVMException(error)
if not target.hasMCDisassembler():
raise llvm.LLVMException(target, "No disassembler provided for %s." % triple)
sti = target.createMCSubtargetInfo(triple, cpu, features)
if not sti:
raise llvm.LLVMException("Could not create sub target info")
return target.createMCDisassembler(sti)

14
llvmpy/src/MC/__init__.py Normal file
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@ -0,0 +1,14 @@
from binding import *
from ..namespace import llvm
MCSubtargetInfo = llvm.Class()
MCDisassembler = llvm.Class()
@MCSubtargetInfo
class MCSubtargetInfo:
pass
@MCDisassembler
class MCDisassembler:
pass

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@ -11,6 +11,8 @@ from src.ADT.StringRef import StringRef
from src.Target.TargetMachine import TargetMachine from src.Target.TargetMachine import TargetMachine
from src.Target.TargetOptions import TargetOptions from src.Target.TargetOptions import TargetOptions
from src.Support.CodeGen import Reloc, CodeModel, CodeGenOpt from src.Support.CodeGen import Reloc, CodeModel, CodeGenOpt
from src.MC import MCSubtargetInfo
from src.MC import MCDisassembler
@Target @Target
class Target: class Target:
@ -43,6 +45,14 @@ class Target:
CodeGenOpt.Level, # = CodeGenOpt.Default CodeGenOpt.Level, # = CodeGenOpt.Default
).require_only(4) ).require_only(4)
createMCSubtargetInfo = Method(ptr(MCSubtargetInfo),
cast(str, StringRef), #triple
cast(str, StringRef), #cpu
cast(str, StringRef) #features
)
createMCDisassembler = Method(ptr(MCDisassembler), ref(MCSubtargetInfo))
@TargetRegistry @TargetRegistry
class TargetRegistry: class TargetRegistry:

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@ -184,6 +184,7 @@ setup(
maintainer_email = 'llvmpy@continuum.io', maintainer_email = 'llvmpy@continuum.io',
url = 'http://www.llvmpy.org/', url = 'http://www.llvmpy.org/',
packages = ['llvm', 'llvm.workaround', packages = ['llvm', 'llvm.workaround',
'llvm.mc',
'llvm_cbuilder', 'llvm_cbuilder',
'llpython', 'llpython',
'llvm_array', 'llvm_array',